From patchwork Tue Feb 14 19:25:02 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Stultz X-Patchwork-Id: 93973 Delivered-To: patches@linaro.org Received: by 10.140.20.99 with SMTP id 90csp1708320qgi; Tue, 14 Feb 2017 11:25:11 -0800 (PST) X-Received: by 10.157.15.220 with SMTP id m28mr15773916otd.67.1487100311560; Tue, 14 Feb 2017 11:25:11 -0800 (PST) Return-Path: Received: from mail-ot0-x233.google.com (mail-ot0-x233.google.com. [2607:f8b0:4003:c0f::233]) by mx.google.com with ESMTPS id c10si687403ote.309.2017.02.14.11.25.11 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 14 Feb 2017 11:25:11 -0800 (PST) Received-SPF: pass (google.com: domain of john.stultz@linaro.org designates 2607:f8b0:4003:c0f::233 as permitted sender) client-ip=2607:f8b0:4003:c0f::233; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: domain of john.stultz@linaro.org designates 2607:f8b0:4003:c0f::233 as permitted sender) smtp.mailfrom=john.stultz@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by mail-ot0-x233.google.com with SMTP id 73so101919648otj.0 for ; Tue, 14 Feb 2017 11:25:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=rGpJlTut9rmXqY2tl0yQZxgDFGfcFmqWpVo1S5sMNLg=; b=eL3oBAEiBMksQtVPvYL8auVWwqC+kkgCDrbTuGWZjtc6BBT+Z0fNrhjJGU2YX02F3X RaPccQOo+P9UQ9zv7KQTPuBOc88iLYlxlmXk2TUkP3rhn0yZpJIxCJsClNX++Yju+VI/ OtwBACypRfyGsX2nHZqE1MokluSY6AyrUWJxo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=rGpJlTut9rmXqY2tl0yQZxgDFGfcFmqWpVo1S5sMNLg=; b=n1jbpahxe/W4C0Enh1p0uUZaynCz5vlJ5Qn6RxRZ1J9AFFySJjMvIli34JOaJOKegt m26JwBDYKwVSlrKQ4onrpRmqbLwwc5gMEiimyD5cTFf6Y8aPG66kvXHXz7LZaxGdLFM8 3u36UWrqJNPnGUv8VaMVztMW39Vzoa/T2P1nNgq4frAXZ0EAUvtrGZLoW/lAnt8yqP0C iaFNiVjby0i1TysRLGHEpq4YzUafThmqo4laOdX8ADJo4wFPHSbljhxNGRdVcvOIP19P KSn4FXdWO/OVE6/1uodjTHtiElM/42I9MuHFMfnXediJ6jTrIcI5bKXvo21QKZeo4ZcX Da8A== X-Gm-Message-State: AMke39mJ89cpJoUGQzZ/CsIGZhGU4EB+l3hmIBMNSpO1N280eWcgu2XA3Ikq54uhVXd2o6zLH8o= X-Received: by 10.98.71.7 with SMTP id u7mr33583001pfa.76.1487100311059; Tue, 14 Feb 2017 11:25:11 -0800 (PST) Return-Path: Received: from localhost.localdomain ([2601:1c2:1002:83f0:4e72:b9ff:fe99:466a]) by smtp.gmail.com with ESMTPSA id t6sm2825378pgt.8.2017.02.14.11.25.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 14 Feb 2017 11:25:09 -0800 (PST) From: John Stultz To: lkml Cc: John Stultz , Daniel Vetter , Jani Nikula , Sean Paul , David Airlie , Rob Clark , Xinliang Liu , Xinliang Liu , Rongrong Zou , Xinwei Kong , Chen Feng , Archit Taneja , dri-devel@lists.freedesktop.org Subject: [RFC][PATCH 2/2] drm: kirin: Restrict modes to known good mode clocks Date: Tue, 14 Feb 2017 11:25:02 -0800 Message-Id: <1487100302-9445-3-git-send-email-john.stultz@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1487100302-9445-1-git-send-email-john.stultz@linaro.org> References: <1487100302-9445-1-git-send-email-john.stultz@linaro.org> Currently the hikey dsi logic cannot generate accurate byte clocks values for all pixel clock values. Thus if a mode clock is selected that cannot match the calculated byte clock, the device will boot with a blank screen. This patch uses the new mode_valid callback to enforces known good mode clocks for well known resolutions, which should allow the display to work from given EDID options, and ensures for a given resolution & refresh, the right mode clock is selected. Cc: Daniel Vetter Cc: Jani Nikula Cc: Sean Paul Cc: David Airlie Cc: Rob Clark Cc: Xinliang Liu Cc: Xinliang Liu Cc: Rongrong Zou Cc: Xinwei Kong Cc: Chen Feng Cc: Archit Taneja Cc: dri-devel@lists.freedesktop.org Signed-off-by: John Stultz --- drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c | 38 +++++++++++++++++++++++++ 1 file changed, 38 insertions(+) -- 2.7.4 diff --git a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c index afc2b5d..9161633 100644 --- a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c +++ b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c @@ -504,6 +504,43 @@ static void ade_crtc_disable(struct drm_crtc *crtc) acrtc->enable = false; } +static enum drm_mode_status ade_crtc_mode_valid(struct drm_crtc *crtc, + struct drm_display_mode *mode) +{ + /* + * kirin_ade cannot generate all modes, so use the whitelist below + */ + DRM_DEBUG("Checking mode %ix%i@%i clock: %i...", + mode->hdisplay, mode->vdisplay, drm_mode_vrefresh(mode), mode->clock); + if ((mode->hdisplay == 1920 && mode->vdisplay == 1080 && mode->clock == 148500) || + (mode->hdisplay == 1920 && mode->vdisplay == 1080 && mode->clock == 80192) || + (mode->hdisplay == 1920 && mode->vdisplay == 1080 && mode->clock == 74250) || + (mode->hdisplay == 1920 && mode->vdisplay == 1080 && mode->clock == 61855) || + (mode->hdisplay == 1680 && mode->vdisplay == 1050 && mode->clock == 147116) || + (mode->hdisplay == 1680 && mode->vdisplay == 1050 && mode->clock == 146250) || + (mode->hdisplay == 1680 && mode->vdisplay == 1050 && mode->clock == 144589) || + (mode->hdisplay == 1600 && mode->vdisplay == 1200 && mode->clock == 160961) || + (mode->hdisplay == 1600 && mode->vdisplay == 900 && mode->clock == 118963) || + (mode->hdisplay == 1440 && mode->vdisplay == 900 && mode->clock == 126991) || + (mode->hdisplay == 1280 && mode->vdisplay == 1024 && mode->clock == 128946) || + (mode->hdisplay == 1280 && mode->vdisplay == 1024 && mode->clock == 98619) || + (mode->hdisplay == 1280 && mode->vdisplay == 960 && mode->clock == 102081) || + (mode->hdisplay == 1280 && mode->vdisplay == 800 && mode->clock == 83496) || + (mode->hdisplay == 1280 && mode->vdisplay == 720 && mode->clock == 74440) || + (mode->hdisplay == 1280 && mode->vdisplay == 720 && mode->clock == 74250) || + (mode->hdisplay == 1024 && mode->vdisplay == 768 && mode->clock == 78800) || + (mode->hdisplay == 1024 && mode->vdisplay == 768 && mode->clock == 75000) || + (mode->hdisplay == 1024 && mode->vdisplay == 768 && mode->clock == 81833) || + (mode->hdisplay == 800 && mode->vdisplay == 600 && mode->clock == 48907) || + (mode->hdisplay == 800 && mode->vdisplay == 600 && mode->clock == 40000)) { + mode->type |= DRM_MODE_TYPE_PREFERRED; + DRM_DEBUG("OK\n"); + return MODE_OK; + } + DRM_DEBUG("BAD\n"); + return MODE_BAD; +} + static void ade_crtc_mode_set_nofb(struct drm_crtc *crtc) { struct ade_crtc *acrtc = to_ade_crtc(crtc); @@ -557,6 +594,7 @@ static void ade_crtc_atomic_flush(struct drm_crtc *crtc, static const struct drm_crtc_helper_funcs ade_crtc_helper_funcs = { .enable = ade_crtc_enable, .disable = ade_crtc_disable, + .mode_valid = ade_crtc_mode_valid, .mode_set_nofb = ade_crtc_mode_set_nofb, .atomic_begin = ade_crtc_atomic_begin, .atomic_flush = ade_crtc_atomic_flush,