From patchwork Thu Jun 1 11:02:52 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 100879 Delivered-To: patch@linaro.org Received: by 10.140.96.100 with SMTP id j91csp745428qge; Thu, 1 Jun 2017 04:03:56 -0700 (PDT) X-Received: by 10.99.149.70 with SMTP id t6mr560702pgn.168.1496315036223; Thu, 01 Jun 2017 04:03:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1496315036; cv=none; d=google.com; s=arc-20160816; b=WSLcZ0bhlYyv6ViEXrdTBPExlQR8zmd+vMJYSgT1ijcM6aX85IJma8/RYbGDPa7ESe pnq/6+G5O9TXf2GThLBbOkVvBvIPy1C657t0JVfLpzDarCwGwBcd0PLc26RlIPf8bIne rSp4iPOO9ONaSXsffbomUzKv/FBZvyoV4f3ivTOMDL6Bvs5v8RmfPjaZBC+97ajzjU90 bYXN8z29q/YEu7D7bkgI+YV1o9p/u9JJKu9Sm0hvGTH8LMgg7zw+6d1j2eFFne8zcQlg rdCBnqdr6BDBEG3jKxZTgm2pQwA/NIyYWUTOgi666GrMFEI+V5fVEoYuRfnqzZ5AVDqo 02Rw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=Rb9PLO/hdDZqqVrluEfeTVPdrQYZp5hEu62v0Ff9RcQ=; b=OIeZ8LROsWbmhePD36UOmPZNorb6TX9/mpK4mv+6z+bF48Xs2UecP4hAmVRKOMalOA niESVzfPpSqVB2YrpVcLl2mxAILxeZbnNRGzgOD2bUi/9BSndZZ/rx5bVi6c4wp3jLKE gXpp+R8T4GVUP+kHfnDoDZqk7uksTqpKf8NT7t4QXb8smF53bCbGO21d7EA/xFOHiiAL tn3m07AK9J+bjqXLWLHFFnOPVV/NofskNoTC+LjDlF1aeSEYI1l7jzg0OdGNoGaZAovY jjcMlDp/uKc9xJJf4gt2jLmkKWyE4Man0xVgDC+UtFKy+CbSgPxmwyjR3Mk4IpnjfcPR XCpg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 28si19575184pfq.323.2017.06.01.04.03.55; Thu, 01 Jun 2017 04:03:56 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751765AbdFALDe (ORCPT + 25 others); Thu, 1 Jun 2017 07:03:34 -0400 Received: from foss.arm.com ([217.140.101.70]:54364 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751737AbdFALDd (ORCPT ); Thu, 1 Jun 2017 07:03:33 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A1BF31596; Thu, 1 Jun 2017 04:03:32 -0700 (PDT) Received: from gby.kfn.arm.com (unknown [10.45.48.155]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 4D0123F578; Thu, 1 Jun 2017 04:03:30 -0700 (PDT) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Joe Perches , Ofir Drang , linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org Subject: [PATCH v2 02/20] staging: ccree: replace bit shift with BIT macro Date: Thu, 1 Jun 2017 14:02:52 +0300 Message-Id: <1496314993-30229-3-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1496314993-30229-1-git-send-email-gilad@benyossef.com> References: <1496314993-30229-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org CC_CTX_SIZE was being defined using a hand rolled bit shift operation. Replace with use of BIT macro. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/cc_crypto_ctx.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.1.4 diff --git a/drivers/staging/ccree/cc_crypto_ctx.h b/drivers/staging/ccree/cc_crypto_ctx.h index 9bfadb21..18c15fc 100644 --- a/drivers/staging/ccree/cc_crypto_ctx.h +++ b/drivers/staging/ccree/cc_crypto_ctx.h @@ -27,7 +27,7 @@ #define CC_CTX_SIZE_LOG2 7 #endif #endif -#define CC_CTX_SIZE (1<> 2) #define CC_DRV_DES_IV_SIZE 8