From patchwork Wed Jun 7 11:52:24 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 103238 Delivered-To: patch@linaro.org Received: by 10.182.29.35 with SMTP id g3csp1714945obh; Wed, 7 Jun 2017 04:56:05 -0700 (PDT) X-Received: by 10.84.130.33 with SMTP id 30mr15104072plc.240.1496836565642; Wed, 07 Jun 2017 04:56:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1496836565; cv=none; d=google.com; s=arc-20160816; b=TtZYO71rjE17mOujETmoPgOhvKB6vqHj/U1h24cEmq/1HJEBqTP8+ZGdTe2ftFtzFM bnqrbnl6pMOunr6O8Ppu/Uu4Kj1XIb7f1kY4Jxw634g6mvPnRzWG16kqBZzYUG21WWuy 1TgK+REFrId07HyCsQlkzMl1T5A8xfGbouWXfNDOz0Blwbe3tS6rvx389MXJ9WoTx5kj qglz0mzs7689S0HOj90/TA9nn1w69PJ7DG5N2MKdldT7ac55wOXUXj3ez2CGatHODRN2 nfZyP3IV5VH/rHrc0EQFUfgXRS8qpAT36PMrOUvG2OU1i3MCfN5WD4g0+OYUrZh5uz7s VKAQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:dkim-filter :arc-authentication-results; bh=bnuTAPuWbftzIKT5/zkquR0k68ypnWuOc83nS3vUZv4=; b=ayiyqyXro6GGclVwXcvueGe5Jre9r0f9ihYf9RDX3Oa3n/i6zekfjI/ohwXRcM2TpF WWxD/TYD4kOPjB7WV+jyh3srg//VH+3DE+YblNWwbKmkjg7sclAQgreG+xG2OpRGn8tt oFgFbV2SHe7ADe9bHJUvThcxUOZuPc37jLNoMuWvcsQULcQ+ltKyfal49Xu46LmyIWkQ sbaHJqCIZ7ljwXr1wsc5D2+UCTDZlEkpA9zGWf3i+96mc1cW0KmXlS1PQhcd3geSr4g3 WCB1iX/KLTgIEzVzTg18YNRzH1h9tD6uR8tel6Qan+5Z52MpbPR4bhlfol8p/bvXSrk1 d6bw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nifty.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m24si1622370pfa.242.2017.06.07.04.56.05; Wed, 07 Jun 2017 04:56:05 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751771AbdFGLzr (ORCPT + 25 others); Wed, 7 Jun 2017 07:55:47 -0400 Received: from conuserg-10.nifty.com ([210.131.2.77]:42786 "EHLO conuserg-10.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751713AbdFGLzi (ORCPT ); Wed, 7 Jun 2017 07:55:38 -0400 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-10.nifty.com with ESMTP id v57BqjZe014276; Wed, 7 Jun 2017 20:53:03 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-10.nifty.com v57BqjZe014276 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1496836384; bh=bnuTAPuWbftzIKT5/zkquR0k68ypnWuOc83nS3vUZv4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HQmSpnTMpLWVAowWTVtEnsX1fjFUDKiJ0dJR5TRluq7XKNPZTKqRuN5E3qZjQHGoN PrawuZxRaNw+fjOREJbYm+qcssKIzkkgsklta5HVDSgwpDZP8/wrLG2JeCDtaHK48q 9DxLQWvkqKq+K1gayvQsZB3AMZ658hmNbwioB7wUIVr4E+ot9sWddnAHmlCuNlIVSM Ly53XsDeTxXpWH6K3oiWmRP8gYoncBdoiQZuDMLwY/Z6Ib1cqFFQ1407aDRNQGJsiH KOklkLEifQZTIAYvhfEh+92eAqa2weL261a6/D8wfCAKny5nlSvyz1rBlGAUITmEbo JV7Ei2z6RS6Bw== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: linux-mtd@lists.infradead.org Cc: Enrico Jorns , Artem Bityutskiy , Dinh Nguyen , Boris Brezillon , Marek Vasut , David Woodhouse , Masami Hiramatsu , Chuanxiao Dong , Jassi Brar , Masahiro Yamada , Cyrille Pitchen , linux-kernel@vger.kernel.org, Brian Norris , Richard Weinberger Subject: [PATCH v5 15/23] mtd: nand: denali: use interrupt instead of polling for bank reset Date: Wed, 7 Jun 2017 20:52:24 +0900 Message-Id: <1496836352-8016-16-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1496836352-8016-1-git-send-email-yamada.masahiro@socionext.com> References: <1496836352-8016-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The current bank reset implementation polls the INTR_STATUS register until interested bits are set. This is not good because: - polling simply wastes time-slice of the thread - The while() loop may continue eternally if no bit is set, for example, due to the controller problem. The denali_wait_for_irq() uses wait_for_completion_timeout(), which is safer. We can use interrupt by moving the denali_reset_bank() call below the interrupt setup. Signed-off-by: Masahiro Yamada --- Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: - Newly added drivers/mtd/nand/denali.c | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) -- 2.7.4 diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index 8e2399ddfe3f..eda206851a4b 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -974,24 +974,25 @@ static int denali_setup_data_interface(struct mtd_info *mtd, static void denali_reset_banks(struct denali_nand_info *denali) { + u32 irq_status; int i; - denali_clear_irq_all(denali); - for (i = 0; i < denali->max_banks; i++) { - iowrite32(1 << i, denali->flash_reg + DEVICE_RESET); - while (!(ioread32(denali->flash_reg + INTR_STATUS(i)) & - (INTR__RST_COMP | INTR__TIME_OUT))) - cpu_relax(); - if (!(ioread32(denali->flash_reg + INTR_STATUS(i)) & - INTR__INT_ACT)) + denali->flash_bank = i; + + denali_reset_irq(denali); + + iowrite32(DEVICE_RESET__BANK(i), + denali->flash_reg + DEVICE_RESET); + + irq_status = denali_wait_for_irq(denali, + INTR__RST_COMP | INTR__INT_ACT | INTR__TIME_OUT); + if (!(irq_status & INTR__INT_ACT)) break; } dev_dbg(denali->dev, "%d chips connected\n", i); denali->max_banks = i; - - denali_clear_irq_all(denali); } static void denali_hw_init(struct denali_nand_info *denali) @@ -1013,7 +1014,6 @@ static void denali_hw_init(struct denali_nand_info *denali) denali->bbtskipbytes = ioread32(denali->flash_reg + SPARE_AREA_SKIP_BYTES); detect_max_banks(denali); - denali_reset_banks(denali); iowrite32(0x0F, denali->flash_reg + RB_PIN_ENABLED); iowrite32(CHIP_EN_DONT_CARE__FLAG, denali->flash_reg + CHIP_ENABLE_DONT_CARE); @@ -1131,9 +1131,6 @@ static void denali_drv_init(struct denali_nand_info *denali) * element that might be access shared data (interrupt status) */ spin_lock_init(&denali->irq_lock); - - /* indicate that MTD has not selected a valid bank yet */ - denali->flash_bank = CHIP_SELECT_INVALID; } static int denali_multidev_fixup(struct denali_nand_info *denali) @@ -1208,6 +1205,9 @@ int denali_init(struct denali_nand_info *denali) } denali_enable_irq(denali); + denali_reset_banks(denali); + + denali->flash_bank = CHIP_SELECT_INVALID; nand_set_flash_node(chip, denali->dev->of_node); /* Fallback to the default name if DT did not give "label" property */