From patchwork Tue Jul 11 14:21:24 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 107394 Delivered-To: patch@linaro.org Received: by 10.140.101.44 with SMTP id t41csp4941835qge; Tue, 11 Jul 2017 07:22:58 -0700 (PDT) X-Received: by 10.84.216.84 with SMTP id f20mr166107plj.103.1499782978161; Tue, 11 Jul 2017 07:22:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1499782978; cv=none; d=google.com; s=arc-20160816; b=skfe2cb8Gar5lolYbHkZ9qrFBUtoKLtugTM6UdgDo07zMRD6LRGebS+V8HFsRnlrQT IMVCiTtiQS8bvToI1f3Tz2Q08UMAbvYbHNLGSBPZ3KPsu8mIJ8SgUhlMAitycsKZ5F34 moawc7Y3spHKcL8Mz+lkadAFez/hDVuLFwmfHselGJytSSI6Sxu5GaPMdIJd2P2TKZNs EUQAwY8Q1OhA4rF2W9Ff6AVUnohaptcLX6mEFjBdx0woiVXoc6vVvB6M/7KiHLeZ11Ya FlVuE8e7n/md2ize1wj1mJfJBeGNNwxEPr1SqmFIPoc5ZemaqCQ4Ke+uMTma8VJKnk8P sLtA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :dkim-signature:dkim-filter:arc-authentication-results; bh=mWXZDl0yxwcbm9vJd1I6lkxalhZDbKr8mQX5Adx4xjQ=; b=VGgdsaRIeqQ4UpPfWGITDiz6sbhd70SuzGmmR6lRbD1V1OXnvq9I3JQnn2Eh5WZhV4 HZbkX7JdQSoQg3Fq/Md/MKlcvWgK0gcdHlpE7emqFb68eqzqoRFK19CjoeXvpHtGY2bL HKp3qr2bU4qB/e5STWWDh22Vvah5TqIewDyG4xEgGqL33iKbDWlyyLmUGjIweDsUws9B aoai+aEXGOt8eRsZn2y69h1SubK4HunV29ARKN70HBIx8eS2QMTEQjuiotQEcskVUkB5 JxKPr/5HblTgF2flFXsbNGvzmfZ+Cw4C9xtcRU0hS9JXLywcSTaXioexeFcZ+doo5p9T N3mw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nifty.com header.b=TMrAjc+1; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o19si58087pfi.173.2017.07.11.07.22.57; Tue, 11 Jul 2017 07:22:58 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com header.b=TMrAjc+1; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933084AbdGKOWt (ORCPT + 25 others); Tue, 11 Jul 2017 10:22:49 -0400 Received: from conuserg-07.nifty.com ([210.131.2.74]:59251 "EHLO conuserg-07.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933061AbdGKOWq (ORCPT ); Tue, 11 Jul 2017 10:22:46 -0400 Received: from grover.sesame (FL1-122-131-185-176.osk.mesh.ad.jp [122.131.185.176]) (authenticated) by conuserg-07.nifty.com with ESMTP id v6BELWub005677; Tue, 11 Jul 2017 23:21:32 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-07.nifty.com v6BELWub005677 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1499782893; bh=mWXZDl0yxwcbm9vJd1I6lkxalhZDbKr8mQX5Adx4xjQ=; h=From:To:Cc:Subject:Date:From; b=TMrAjc+1zrToe4PzWJPnF/7WFiXCKLC/qwxBDVozMBLs0CcDpDgiO6PQL0tMGrw1r XShCokWf+VS42teiv0fIBcM5UlIvwU1NNqaiSdGPIoegMHReha8CfUYE5NSZ63T0zS 4MbXcZDkaqV3ll0SEBgJi5oWqRefmQJaOfI/Gyn+OLzH18XZqxVT0n8RQJOJNw7Unx UwoSp6HVl/SjEhQrL7VLdjxO5id9j2XAak3IhF7PZaNfHQKrEyWVt/1rFnNo2L4Wih hNsqmQwCHJnCOj82XKHswhAvL+YUinEA2Vv8GXucMSRy4GVZNw3vHQXlOuFtox4BLM cBnilgdPnEnWA== X-Nifty-SrcIP: [122.131.185.176] From: Masahiro Yamada To: linux-arm-kernel@lists.infradead.org Cc: Masahiro Yamada , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Mark Rutland , Russell King Subject: [PATCH 1/2] ARM: dts: uniphier: add Denali NAND controller node Date: Tue, 11 Jul 2017 23:21:24 +0900 Message-Id: <1499782885-29023-1-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add NAND controller node to sLD3, LD4, Pro4, sLD8, Pro5, and PXs2. Set up pinctrl to enable 2 chip select lines except Pro4. The CS1 for Pro4 is multiplexed with other peripherals such as UART2, so I did not enable it. Signed-off-by: Masahiro Yamada --- arch/arm/boot/dts/uniphier-ld4-ref.dts | 4 ++++ arch/arm/boot/dts/uniphier-ld4.dtsi | 11 +++++++++++ arch/arm/boot/dts/uniphier-ld6b-ref.dts | 4 ++++ arch/arm/boot/dts/uniphier-pro4-ref.dts | 4 ++++ arch/arm/boot/dts/uniphier-pro4.dtsi | 11 +++++++++++ arch/arm/boot/dts/uniphier-pro5.dtsi | 11 +++++++++++ arch/arm/boot/dts/uniphier-pxs2.dtsi | 11 +++++++++++ arch/arm/boot/dts/uniphier-sld3-ref.dts | 4 ++++ arch/arm/boot/dts/uniphier-sld3.dtsi | 9 +++++++++ arch/arm/boot/dts/uniphier-sld8.dtsi | 11 +++++++++++ 10 files changed, 80 insertions(+) -- 2.7.4 diff --git a/arch/arm/boot/dts/uniphier-ld4-ref.dts b/arch/arm/boot/dts/uniphier-ld4-ref.dts index 4817ebb28eb2..dd4a0e181d7f 100644 --- a/arch/arm/boot/dts/uniphier-ld4-ref.dts +++ b/arch/arm/boot/dts/uniphier-ld4-ref.dts @@ -64,3 +64,7 @@ &usb1 { status = "okay"; }; + +&nand { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/uniphier-ld4.dtsi b/arch/arm/boot/dts/uniphier-ld4.dtsi index fb2fd9605b9d..dcabb5b2c0f7 100644 --- a/arch/arm/boot/dts/uniphier-ld4.dtsi +++ b/arch/arm/boot/dts/uniphier-ld4.dtsi @@ -285,6 +285,17 @@ #reset-cells = <1>; }; }; + + nand: nand@68000000 { + compatible = "socionext,uniphier-denali-nand-v5a"; + status = "disabled"; + reg-names = "nand_data", "denali_reg"; + reg = <0x68000000 0x20>, <0x68100000 0x1000>; + interrupts = <0 65 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_nand2cs>; + clocks = <&sys_clk 2>; + }; }; }; diff --git a/arch/arm/boot/dts/uniphier-ld6b-ref.dts b/arch/arm/boot/dts/uniphier-ld6b-ref.dts index 96db4abc02c3..ba46d2cab2fd 100644 --- a/arch/arm/boot/dts/uniphier-ld6b-ref.dts +++ b/arch/arm/boot/dts/uniphier-ld6b-ref.dts @@ -58,3 +58,7 @@ &i2c0 { status = "okay"; }; + +&nand { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/uniphier-pro4-ref.dts b/arch/arm/boot/dts/uniphier-pro4-ref.dts index 4cf539245f2e..a2bbb800c70b 100644 --- a/arch/arm/boot/dts/uniphier-pro4-ref.dts +++ b/arch/arm/boot/dts/uniphier-pro4-ref.dts @@ -66,3 +66,7 @@ &usb3 { status = "okay"; }; + +&nand { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniphier-pro4.dtsi index 37400becf4ba..13198f7fee4e 100644 --- a/arch/arm/boot/dts/uniphier-pro4.dtsi +++ b/arch/arm/boot/dts/uniphier-pro4.dtsi @@ -305,6 +305,17 @@ #reset-cells = <1>; }; }; + + nand: nand@68000000 { + compatible = "denali,denali-nand-uniphier-v5a"; + status = "disabled"; + reg-names = "nand_data", "denali_reg"; + reg = <0x68000000 0x20>, <0x68100000 0x1000>; + interrupts = <0 65 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_nand>; + clocks = <&sys_clk 2>; + }; }; }; diff --git a/arch/arm/boot/dts/uniphier-pro5.dtsi b/arch/arm/boot/dts/uniphier-pro5.dtsi index 140327ddde1c..dc61e1282254 100644 --- a/arch/arm/boot/dts/uniphier-pro5.dtsi +++ b/arch/arm/boot/dts/uniphier-pro5.dtsi @@ -368,6 +368,17 @@ #reset-cells = <1>; }; }; + + nand: nand@68000000 { + compatible = "denali,denali-nand-uniphier-v5b"; + status = "disabled"; + reg-names = "nand_data", "denali_reg"; + reg = <0x68000000 0x20>, <0x68100000 0x1000>; + interrupts = <0 65 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_nand2cs>; + clocks = <&sys_clk 2>; + }; }; }; diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi index bace751d4023..8b7412ccd160 100644 --- a/arch/arm/boot/dts/uniphier-pxs2.dtsi +++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi @@ -352,6 +352,17 @@ #reset-cells = <1>; }; }; + + nand: nand@68000000 { + compatible = "socionext,uniphier-denali-nand-v5b"; + status = "disabled"; + reg-names = "nand_data", "denali_reg"; + reg = <0x68000000 0x20>, <0x68100000 0x1000>; + interrupts = <0 65 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_nand2cs>; + clocks = <&sys_clk 2>; + }; }; }; diff --git a/arch/arm/boot/dts/uniphier-sld3-ref.dts b/arch/arm/boot/dts/uniphier-sld3-ref.dts index 70cda39a3dd2..c4d4a6d0ce7c 100644 --- a/arch/arm/boot/dts/uniphier-sld3-ref.dts +++ b/arch/arm/boot/dts/uniphier-sld3-ref.dts @@ -73,3 +73,7 @@ &usb3 { status = "okay"; }; + +&nand { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/uniphier-sld3.dtsi b/arch/arm/boot/dts/uniphier-sld3.dtsi index 408287936613..eaedce34d706 100644 --- a/arch/arm/boot/dts/uniphier-sld3.dtsi +++ b/arch/arm/boot/dts/uniphier-sld3.dtsi @@ -256,5 +256,14 @@ #reset-cells = <1>; }; }; + + nand: nand@f8000000 { + compatible = "denali,denali-nand-uniphier-v5a"; + status = "disabled"; + reg-names = "nand_data", "denali_reg"; + reg = <0xf8000000 0x20>, <0xf8100000 0x1000>; + interrupts = <0 65 4>; + clocks = <&sys_clk 2>; + }; }; }; diff --git a/arch/arm/boot/dts/uniphier-sld8.dtsi b/arch/arm/boot/dts/uniphier-sld8.dtsi index 9fb9167f2db4..433d00d588e2 100644 --- a/arch/arm/boot/dts/uniphier-sld8.dtsi +++ b/arch/arm/boot/dts/uniphier-sld8.dtsi @@ -285,6 +285,17 @@ #reset-cells = <1>; }; }; + + nand: nand@68000000 { + compatible = "denali,denali-nand-uniphier-v5a"; + status = "disabled"; + reg-names = "nand_data", "denali_reg"; + reg = <0x68000000 0x20>, <0x68100000 0x1000>; + interrupts = <0 65 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_nand2cs>; + clocks = <&sys_clk 2>; + }; }; };