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[209.132.180.67]) by mx.google.com with ESMTP id 83si2021065pfy.267.2017.08.29.02.37.14; Tue, 29 Aug 2017 02:37:15 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Abts+BUR; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752283AbdH2JhL (ORCPT + 26 others); Tue, 29 Aug 2017 05:37:11 -0400 Received: from mail-wr0-f170.google.com ([209.85.128.170]:37898 "EHLO mail-wr0-f170.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752111AbdH2JgA (ORCPT ); Tue, 29 Aug 2017 05:36:00 -0400 Received: by mail-wr0-f170.google.com with SMTP id 40so7880585wrv.5 for ; Tue, 29 Aug 2017 02:36:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=tXpsYGXETUHGWAB27CuFQF8nNUMRh/IOVM/Bap36nU8=; b=Abts+BURDl3k94HpcGeXVPttqD0wQvTyBuZ7GGq6Pn/fJizVQeZeWvdVCmnwijaAUt Z/atfJkdnoORR7S7seAMrQauPYMQbd6jOrS6atvv6ExEHLAzTjekLPaZnaUl4qbr2Pds nKxkFyDPFHO10P5RDy5DhBKNNBPcKQi2QJLWM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=tXpsYGXETUHGWAB27CuFQF8nNUMRh/IOVM/Bap36nU8=; b=dC6JrnAZjmls4KJDxQuicp+ddl0w/dPgVOnUtFP9aSqKZunLJnnjAVfgKB+093FNz7 zf01Ep+wgLQ66S9BUfECEoNMC9uXDLi5G21t4uU94ve/73BF5/IELVazRLLwz7JE6H4d EIq41/YD9FgTj2UmwESTjKBNOFCI+PNEYXa9AQnO5GibKA6Z8r4zbohKJTEROEorcr+R Mh7jyD64t9mN6OLAfjAIbtPbqH59avIBzp+SA8FvQyrSHquIJPQPTu6Agl5HXPXLRyqC OzWlmNWpjG46dJ1KY/Ig8CajPrMKcXB4Pck7F/YQXiUCEj+fIMMw1dyyhMNm42hVs/CO xh5w== X-Gm-Message-State: AHYfb5jwL1bOOpZ55+NVO7kMdxrM8WrtyYmPBskxmGzJnhxsOpKkPqaF 6qzb/2uCUfqwyqMH X-Received: by 10.223.174.225 with SMTP id y88mr2111064wrc.7.1503999359364; Tue, 29 Aug 2017 02:35:59 -0700 (PDT) Received: from localhost.localdomain ([2a01:e35:879a:6cd0:cc22:a7ba:e8a7:7caf]) by smtp.gmail.com with ESMTPSA id r18sm3621775wrc.44.2017.08.29.02.35.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 29 Aug 2017 02:35:58 -0700 (PDT) From: Daniel Lezcano To: tglx@linutronix.de Cc: linux-kernel@vger.kernel.org, Magnus Damm , Geert Uytterhoeven , Laurent Pinchart , Rob Herring , Rob Herring , Mark Rutland , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS) Subject: [PATCH 5/9] devicetree: bindings: r8a73a4 and R-Car Gen2 CMT bindings Date: Tue, 29 Aug 2017 11:34:23 +0200 Message-Id: <1503999271-15712-5-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1503999271-15712-1-git-send-email-daniel.lezcano@linaro.org> References: <20170829093354.GA2572@mai> <1503999271-15712-1-git-send-email-daniel.lezcano@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Magnus Damm Update SoC-specific bindings for r8a73a4 and R-Car Gen2 CMT0 and CMT1. Signed-off-by: Magnus Damm Acked-by: Geert Uytterhoeven Acked-by: Laurent Pinchart Acked-by: Rob Herring Signed-off-by: Daniel Lezcano --- .../devicetree/bindings/timer/renesas,cmt.txt | 24 +++++++++++++--------- 1 file changed, 14 insertions(+), 10 deletions(-) -- 2.7.4 diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.txt b/Documentation/devicetree/bindings/timer/renesas,cmt.txt index 2583aeb..e81e0d2 100644 --- a/Documentation/devicetree/bindings/timer/renesas,cmt.txt +++ b/Documentation/devicetree/bindings/timer/renesas,cmt.txt @@ -36,19 +36,23 @@ Required Properties: (CMT1 on sh73a0 and r8a7740) This is a fallback for the above renesas,cmt-48-* entries. + - "renesas,cmt0-r8a73a4" for the 32-bit CMT0 device included in r8a73a4. + - "renesas,cmt1-r8a73a4" for the 48-bit CMT1 device included in r8a73a4. + - "renesas,cmt0-r8a7790" for the 32-bit CMT0 device included in r8a7790. + - "renesas,cmt1-r8a7790" for the 48-bit CMT1 device included in r8a7790. + - "renesas,cmt0-r8a7791" for the 32-bit CMT0 device included in r8a7791. + - "renesas,cmt1-r8a7791" for the 48-bit CMT1 device included in r8a7791. + - "renesas,cmt0-r8a7793" for the 32-bit CMT0 device included in r8a7793. + - "renesas,cmt1-r8a7793" for the 48-bit CMT1 device included in r8a7793. + - "renesas,cmt0-r8a7794" for the 32-bit CMT0 device included in r8a7794. + - "renesas,cmt1-r8a7794" for the 48-bit CMT1 device included in r8a7794. + - "renesas,rcar-gen2-cmt0" for 32-bit CMT0 devices included in R-Car Gen2. - "renesas,rcar-gen2-cmt1" for 48-bit CMT1 devices included in R-Car Gen2. + These are fallbacks for r8a73a4 and all the R-Car Gen2 + entries listed above. - - "renesas,cmt-48-r8a73a4" for the r8a73a4 48-bit CMT - (CMT[01]) - - "renesas,cmt-48-r8a7790" for the r8a7790 48-bit CMT - (CMT[01]) - - "renesas,cmt-48-r8a7791" for the r8a7791 48-bit CMT - (CMT[01]) - - "renesas,cmt-48-gen2" for all second generation 48-bit CMT - (CMT[01] on r8a73a4, r8a7790 and r8a7791) - This is a fallback for the renesas,cmt-48-r8a73a4, - renesas,cmt-48-r8a7790 and renesas,cmt-48-r8a7791 entries. + - "renesas,cmt-48-gen2" is , use "renesas,cmt[01]-*" instead. - reg: base address and length of the registers block for the timer module. - interrupts: interrupt-specifier for the timer, one per channel.