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[209.132.180.67]) by mx.google.com with ESMTP id k190si4509091pgc.652.2017.10.02.07.14.26; Mon, 02 Oct 2017 07:14:26 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751526AbdJBOOL (ORCPT + 26 others); Mon, 2 Oct 2017 10:14:11 -0400 Received: from ns.mm-sol.com ([37.157.136.199]:58777 "EHLO extserv.mm-sol.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751268AbdJBOOJ (ORCPT ); Mon, 2 Oct 2017 10:14:09 -0400 Received: from mms-0439.qualcomm.mm-sol.com (unknown [37.157.136.206]) by extserv.mm-sol.com (Postfix) with ESMTPSA id 679FFCC2D; Mon, 2 Oct 2017 17:14:06 +0300 (EEST) From: Todor Tomov To: wsa@the-dreams.de, linux-i2c@vger.kernel.org Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Todor Tomov , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH 1/4] dt-bindings: media: Binding document for Qualcomm Camera Control Interface driver Date: Mon, 2 Oct 2017 17:13:30 +0300 Message-Id: <1506953613-23875-2-git-send-email-todor.tomov@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1506953613-23875-1-git-send-email-todor.tomov@linaro.org> References: <1506953613-23875-1-git-send-email-todor.tomov@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add DT binding document for Qualcomm Camera Control Interface driver CC: Rob Herring CC: Mark Rutland CC: devicetree@vger.kernel.org Signed-off-by: Todor Tomov --- .../devicetree/bindings/i2c/i2c-qcom-cci.txt | 55 ++++++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt -- 2.7.4 diff --git a/Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt b/Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt new file mode 100644 index 0000000..f4c5338 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt @@ -0,0 +1,55 @@ +Qualcomm Camera Control Interface I2C controller + +Required properties: + - compatible: Should be one of: + - "qcom,cci-v1.0.8" for 8916; + - "qcom,cci-v1.4.0" for 8996. + - #address-cells: Should be <1>. + - #size-cells: Should be <0>. + - reg: Base address of the controller and length of memory mapped region. + - reg-names: Should be "cci". + - interrupts: Specifier for CCI interrupt. + - interrupt-names: Should be "cci". + - clocks: List of clock specifiers, one for each entry in clock-names. + - clock-names: Should contain: + - "mmss_mmagic_ahb" - on 8996 only; + - "camss_top_ahb"; + - "cci_ahb"; + - "cci"; + - "camss_ahb". + - pinctrl-names: Should contain only one value - "default". + - pinctrl-0: Pin control group to be used for this controller. + + +Required properties on 8996: + - power-domains: Power domain specifier. + +Optional: + - clock-frequency: Desired I2C bus clock frequency in Hz, defaults to 100 kHz + if omitted. + +Example: + + cci: qcom,cci@a0c000 { + compatible = "qcom,cci-v1.4.0"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xa0c000 0x1000>; + reg-names = "cci"; + interrupts = ; + interrupt-names = "cci"; + power-domains = <&mmcc CAMSS_GDSC>; + clocks = <&mmcc MMSS_MMAGIC_AHB_CLK>, + <&mmcc CAMSS_TOP_AHB_CLK>, + <&mmcc CAMSS_CCI_AHB_CLK>, + <&mmcc CAMSS_CCI_CLK>, + <&mmcc CAMSS_AHB_CLK>; + clock-names = "mmss_mmagic_ahb", + "camss_top_ahb", + "cci_ahb", + "cci", + "camss_ahb"; + pinctrl-names = "default"; + pinctrl-0 = <&cci0_default>; + clock-frequency = <400000>; + };