From patchwork Thu Oct 12 12:30:37 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 115622 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp1885447qgn; Thu, 12 Oct 2017 05:32:12 -0700 (PDT) X-Google-Smtp-Source: AOwi7QAChjfl3ePQzPrlChfjoegepmRQnSZ5Vsdk8hJVUHD0pwPlbXSlGxoLHg2lC/cUd/PC1PsZ X-Received: by 10.99.127.67 with SMTP id p3mr98579pgn.321.1507811532575; Thu, 12 Oct 2017 05:32:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1507811532; cv=none; d=google.com; s=arc-20160816; b=DZ+S++729/ZQzXrT5wleWrVoGGg8q1PVVbfyXsF97D7dOUiZtX/BFoH9KKnz2qxTeG vwVyPDn/bGoGDOtc3H3F5NqZWaSG04KSdFvE2lLEc6pElccVGZnLC+Zw3IsRkjgZxUS/ fRwJEpZJvM0RRLXZAQXF5g2qpLn+H9HZYyqkNFFxa+Au9Z4aPlsV9GpEINi2LuNxJBkj z9lOS5n46Wt4G55LZgk0DLvXy78zcJTTJOBVCQkEpnkGuouBsDMsSmtmZd/LeGIUF90s aiz075Yd+pAHa7ZBuIMpZDTwI+u03HxyJz8DKaFFRfdyjeSdqIDG4Xa4Zd6S+tX+O4hE CeqQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=gI9LJJevAiCRZakWcpaSKT0qnPZufiZIIRXSl56bjpY=; b=XDNpuUgzHX7F06S2cNy6gK/J1eLplimYP8R5rxMI7xkwPS5+NV1lZc6zYHaWxrhCDl Haqf0r6hsSjUjTV8ZAbQawLhCgus8681dU0KiDt7cy2lOr/mreeN4vEEgA0FRpvfY6fV BF+0jeTQ8YsYpZGMWgW/7DnZFD5/28oAv9d96kawnZKu23lz9AVito6l6wac8gueQ83R zLFnIj775I54Yq3cqBMEDNXdzhf2iVQ1Mw3rvOVbSeW7SMl2oxGAVoeNLUPqqh2Z6LvK wXdvL4vJv8PhucZFbOwgHeEt+WuxhCoPifQhEW1Tsp45xj35a9LY643tWALT+x9jo7S5 bkmQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p4si11163505pgc.443.2017.10.12.05.32.12; Thu, 12 Oct 2017 05:32:12 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757554AbdJLMbx (ORCPT + 27 others); Thu, 12 Oct 2017 08:31:53 -0400 Received: from foss.arm.com ([217.140.101.70]:45896 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751458AbdJLMai (ORCPT ); Thu, 12 Oct 2017 08:30:38 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D45451688; Thu, 12 Oct 2017 05:30:37 -0700 (PDT) Received: from edgewater-inn.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A5A483F59C; Thu, 12 Oct 2017 05:30:37 -0700 (PDT) Received: by edgewater-inn.cambridge.arm.com (Postfix, from userid 1000) id B9F6C1AE2F86; Thu, 12 Oct 2017 13:30:40 +0100 (BST) From: Will Deacon To: linux-arm-kernel@lists.infradead.org Cc: marc.zyngier@arm.com, mark.rutland@arm.com, kim.phillips@arm.com, tglx@linutronix.de, peterz@infradead.org, alexander.shishkin@linux.intel.com, robh@kernel.org, suzuki.poulose@arm.com, pawel.moll@arm.com, mathieu.poirier@linaro.org, mingo@redhat.com, linux-kernel@vger.kernel.org, Will Deacon Subject: [PATCH v6 6/7] dt-bindings: Document devicetree binding for ARM SPE Date: Thu, 12 Oct 2017 13:30:37 +0100 Message-Id: <1507811438-2267-7-git-send-email-will.deacon@arm.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1507811438-2267-1-git-send-email-will.deacon@arm.com> References: <1507811438-2267-1-git-send-email-will.deacon@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch documents the devicetree binding in use for ARM SPE. Cc: Rob Herring Acked-by: Mark Rutland Signed-off-by: Will Deacon --- Documentation/devicetree/bindings/arm/spe-pmu.txt | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/spe-pmu.txt -- 2.1.4 diff --git a/Documentation/devicetree/bindings/arm/spe-pmu.txt b/Documentation/devicetree/bindings/arm/spe-pmu.txt new file mode 100644 index 000000000000..93372f2a7df9 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/spe-pmu.txt @@ -0,0 +1,20 @@ +* ARMv8.2 Statistical Profiling Extension (SPE) Performance Monitor Units (PMU) + +ARMv8.2 introduces the optional Statistical Profiling Extension for collecting +performance sample data using an in-memory trace buffer. + +** SPE Required properties: + +- compatible : should be one of: + "arm,statistical-profiling-extension-v1" + +- interrupts : Exactly 1 PPI must be listed. For heterogeneous systems where + SPE is only supported on a subset of the CPUs, please consult + the arm,gic-v3 binding for details on describing a PPI partition. + +** Example: + +spe-pmu { + compatible = "arm,statistical-profiling-extension-v1"; + interrupts = ; +};