From patchwork Fri Nov 17 05:24:47 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 119098 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp94865qgn; Thu, 16 Nov 2017 21:26:41 -0800 (PST) X-Google-Smtp-Source: AGs4zMbrrKlI7jsGcLP6kHZm7eQGh9c3nvpsK1N0tsGkxpYtrzs1f6/nj+TR45AFz0Xre+S3zkIj X-Received: by 10.99.167.79 with SMTP id w15mr3912715pgo.390.1510896401852; Thu, 16 Nov 2017 21:26:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1510896401; cv=none; d=google.com; s=arc-20160816; b=tsyWnTmCNLUcd6UZT4K9bVeubo5+fhz5aF+yQmlahx+m+Bxhzkguw9+oiN2yIpPj/t 8jcWbvrbHzvVvVouj8HydkR+u0VFhOWNcuB7X9PyPr8S0O/xD7by/6DMgr3L82B4jcgt 5v8FXk+FOF6dL8IXKnk9BX7m8SuSeVFsMWWxv0LV1O27KIueE24+7wS4CuONsvbxzL2+ mA/uUL4CyepPITQFnM8Q77yJdmuKVtf99JroJekei2STYgFYplccPoJA7KI77V/3/911 lGxgnl/YEpE8S9wDyBBOkyEGDnMRbpgnw+c1r0wBH9AGZStel/h32mDLxs6GJlkBvQ/2 w2OA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:dkim-filter :arc-authentication-results; bh=L/LlZh1NrfndiLgvGhzQKFw9OBCnw2eigTkRH8Cog84=; b=I3/bSYyLs2n90PCQwIXK2HWfwt0DoJMaCXYbQqoletOgtBwRaHtFjITO6i+hF/Sbyk kT/vioXZQtDTm9N97ItCHXlaJh9rzUOewiYqRYREB0mJHLhfqYq6hyRIwntKGOOgPcz9 lb+gWEXheul1wSbOoDR/DLIEzEoHbssWYUTeG/BBXqKcaaiozkQeNrHlPuM2quqhX7I0 hj5Dbt6EvNzgE4wpGlou1G9HIPNZ83pkYxBD6CGYtywXZrvY5H59SQ89IZulu3fQIcLo ByAD1HQkQ3Xx9ONMjm1y2scuEprY4ukJHML2Gk0E4tf4mGwjYHVbY/Cif6DEVzJkIkuZ x1cA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=y2NTAptJ; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g17si2085477plo.542.2017.11.16.21.26.41; Thu, 16 Nov 2017 21:26:41 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=y2NTAptJ; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756809AbdKQF0W (ORCPT + 28 others); Fri, 17 Nov 2017 00:26:22 -0500 Received: from conuserg-07.nifty.com ([210.131.2.74]:43496 "EHLO conuserg-07.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751625AbdKQFZ4 (ORCPT ); Fri, 17 Nov 2017 00:25:56 -0500 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-07.nifty.com with ESMTP id vAH5OoDZ020933; Fri, 17 Nov 2017 14:24:52 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-07.nifty.com vAH5OoDZ020933 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1510896293; bh=L/LlZh1NrfndiLgvGhzQKFw9OBCnw2eigTkRH8Cog84=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=y2NTAptJg5W7mhccJk1uMc38iXYlOgIdf//s980AZwjpgSXqWdceqaWOiyR8b5NNY jgnJpJ3RU+2xicKcErVNptJTZyd1Uc8fUHPKakBa6XXFkC7R8mHKM981oP+boqa6mv CXRAHNUNBvzzJO9pAZt75FxXca7IaOnoDWDgKdkTF6HGV9I1dZYbYlvDjwzBj6EldV jTlPRGg++fHmNop0xM4XRDIb4z1UWbIS3Ydf0YXnKOMryVNi3aDJCz4uktk/FQp41s vomCZZ523F2w4IE7Moy0A8URHB09fZ0jJonrze98cYTzqBVepfApNa44YcLRY312lL moFJfyu9AL8DQ== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: linux-arm-kernel@lists.infradead.org Cc: Masahiro Yamada , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Will Deacon , Mark Rutland , Catalin Marinas Subject: [PATCH 3/4] arm64: dts: uniphier: use macros in dt-bindings header Date: Fri, 17 Nov 2017 14:24:47 +0900 Message-Id: <1510896288-31212-3-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510896288-31212-1-git-send-email-yamada.masahiro@socionext.com> References: <1510896288-31212-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The dt-bindings header was applied to the driver subsystem. I had to wait for a merge window to use it from DT. Signed-off-by: Masahiro Yamada --- arch/arm64/boot/dts/socionext/uniphier-ld11-ref.dts | 2 +- arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 3 ++- arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts | 2 +- arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 3 ++- arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 3 ++- 5 files changed, 8 insertions(+), 5 deletions(-) -- 2.7.4 diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11-ref.dts b/arch/arm64/boot/dts/socionext/uniphier-ld11-ref.dts index 6bdefb2..54c5317 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld11-ref.dts +++ b/arch/arm64/boot/dts/socionext/uniphier-ld11-ref.dts @@ -50,7 +50,7 @@ &gpio { xirq0 { gpio-hog; - gpios = <120 0>; + gpios = ; input; }; }; diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi index 1c63d0a..ce40eb5 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi @@ -8,6 +8,7 @@ */ #include +#include /memreserve/ 0x80000000 0x02000000; @@ -100,7 +101,7 @@ emmc_pwrseq: emmc-pwrseq { compatible = "mmc-pwrseq-emmc"; - reset-gpios = <&gpio 26 GPIO_ACTIVE_LOW>; + reset-gpios = <&gpio UNIPHIER_GPIO_PORT(3, 2) GPIO_ACTIVE_LOW>; }; timer { diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts b/arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts index 254d679..6933710 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts +++ b/arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts @@ -50,7 +50,7 @@ &gpio { xirq0 { gpio-hog; - gpios = <120 0>; + gpios = ; input; }; }; diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi index 5c81070..8a3276b 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi @@ -8,6 +8,7 @@ */ #include +#include #include /memreserve/ 0x80000000 0x02000000; @@ -172,7 +173,7 @@ emmc_pwrseq: emmc-pwrseq { compatible = "mmc-pwrseq-emmc"; - reset-gpios = <&gpio 26 GPIO_ACTIVE_LOW>; + reset-gpios = <&gpio UNIPHIER_GPIO_PORT(3, 2) GPIO_ACTIVE_LOW>; }; timer { diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi index 48e7331..d2beadd 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi @@ -8,6 +8,7 @@ */ #include +#include /memreserve/ 0x80000000 0x02000000; @@ -128,7 +129,7 @@ emmc_pwrseq: emmc-pwrseq { compatible = "mmc-pwrseq-emmc"; - reset-gpios = <&gpio 47 GPIO_ACTIVE_LOW>; + reset-gpios = <&gpio UNIPHIER_GPIO_PORT(5, 7) GPIO_ACTIVE_LOW>; }; timer {