From patchwork Wed Dec 6 12:35:21 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 120823 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp6999576qgn; Wed, 6 Dec 2017 04:36:20 -0800 (PST) X-Google-Smtp-Source: AGs4zMY2o/EMUqCxgkm2/oTrMbTjcgdL5TwtfAZuagxWMHulDfTS4pI635pyftrgR7HzQrXueang X-Received: by 10.84.215.207 with SMTP id g15mr21459709plj.369.1512563780056; Wed, 06 Dec 2017 04:36:20 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1512563780; cv=none; d=google.com; s=arc-20160816; b=XhGDjnYGIkGFS+zmGV/t55TrS8XFy5j8MWHY9cHvgTM2mlgR6AMlA+f6nWLCoJjFtT rxMspQeKYExIX2AhoCNOcVY+3tRV8sI8L2Jpqg1SIuTfcI91F3jZMSAHutxkKhwfq/iA jLaVR4KP2VN8kL3nd4+AsY3qHaYj0+kSNnqBQlfPUsflZQ94CXBSX685nSyH1v8diSwP PLMB23+RHVjAylygPtnbMY293YNFZjTkI2SJa1f0YErFU/ztqcby/uSv72Ki3zbmtTFq 5r4+t5gcAvxZy3IJf4Rr9k+oANWGIm6oDYNQgzkrv+cytzfrcI4jR7cpTH3Rz+x5G50E OKSA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=gVdqTyu+83Gd3I1MtBMtUEKRWL0d5Zxwn9cWMXcQWNU=; b=lkhmB44a3TOJDvJMGa/Sk0nN6fxwOMCsXAz9bv2UNFga3hKyUbrGee0ibNphczIT54 YwumOjywP7qKBVlgIneFDQ7dPSmprashWeIh5tbEK2T7M1T4LH7eL1BSdwRpSKISzqMj MH6Qyh5FLM/+ZK+L1If39dQz6cZEE9pfRgj+ml9OhZnYUz15ydNTdISH30Oc5G2VsNAh sVzVhA4SRp38I+/dCJdckbN5lQ6glzXyQ0l32IvQHHBqIxrNrOgOc+4EzG3H2ZoWs/O+ Q/lYCm8agZCv+Z0d2aX7RSeZ+3Yt5PCKQIHPA1ubIczixY6BySoGpMP1b/VnGiWouKOz EgbA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f8si1924185pli.451.2017.12.06.04.36.19; Wed, 06 Dec 2017 04:36:20 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752274AbdLFMgQ (ORCPT + 28 others); Wed, 6 Dec 2017 07:36:16 -0500 Received: from foss.arm.com ([217.140.101.70]:34608 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751748AbdLFMgK (ORCPT ); Wed, 6 Dec 2017 07:36:10 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 763C115BF; Wed, 6 Dec 2017 04:36:10 -0800 (PST) Received: from edgewater-inn.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 46D813F5BD; Wed, 6 Dec 2017 04:36:10 -0800 (PST) Received: by edgewater-inn.cambridge.arm.com (Postfix, from userid 1000) id DF3B81AE35FB; Wed, 6 Dec 2017 12:36:15 +0000 (GMT) From: Will Deacon To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, catalin.marinas@arm.com, mark.rutland@arm.com, ard.biesheuvel@linaro.org, sboyd@codeaurora.org, dave.hansen@linux.intel.com, keescook@chromium.org, msalter@redhat.com, labbott@redhat.com, tglx@linutronix.de, Will Deacon Subject: [PATCH v3 02/20] arm64: mm: Temporarily disable ARM64_SW_TTBR0_PAN Date: Wed, 6 Dec 2017 12:35:21 +0000 Message-Id: <1512563739-25239-3-git-send-email-will.deacon@arm.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1512563739-25239-1-git-send-email-will.deacon@arm.com> References: <1512563739-25239-1-git-send-email-will.deacon@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org We're about to rework the way ASIDs are allocated, switch_mm is implemented and low-level kernel entry/exit is handled, so keep the ARM64_SW_TTBR0_PAN code out of the way whilst we do the heavy lifting. It will be re-enabled in a subsequent patch. Reviewed-by: Mark Rutland Signed-off-by: Will Deacon --- arch/arm64/Kconfig | 1 + 1 file changed, 1 insertion(+) -- 2.1.4 diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index a93339f5178f..7e7d7fd152c4 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -910,6 +910,7 @@ endif config ARM64_SW_TTBR0_PAN bool "Emulate Privileged Access Never using TTBR0_EL1 switching" + depends on BROKEN # Temporary while switch_mm is reworked help Enabling this option prevents the kernel from accessing user-space memory directly by pointing TTBR0_EL1 to a reserved