From patchwork Fri Jan 5 13:12:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 123514 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp800293qgn; Fri, 5 Jan 2018 05:13:00 -0800 (PST) X-Google-Smtp-Source: ACJfBosXXItqidwTkoysypV6VxD6hc1fLZXIYTAXtFIGFfcH/ZzelMLPpR2X91WqNyEunGC4uZqm X-Received: by 10.101.82.138 with SMTP id y10mr2512014pgp.165.1515157980592; Fri, 05 Jan 2018 05:13:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1515157980; cv=none; d=google.com; s=arc-20160816; b=tEOrJ4VjKvayA5y5HvfU+/KQyfGs54rlNmtbDXysqWToX3bJERWoqYELOABPnPoVws mR4Ra1q7Jq91nPiJChROWNqGAVSJs8wPz8Fnc9UXzWK9ilYcygdEqwqBB06LGU9p1ZyY SMsw0kTKDdi4EC65I5Bt8lmEAcNMfd6oI4PzcxMGtngoL4ENGfaBQZsm+z2HCY7kDZ85 u6ZA1yIrh5qN1mbcgp2jO4RrUFtf4XUpXyDVR9jIbDJPKX/ODA35aqSPXE3JJRh7q0zB j/i7E5pKRNVSyg9Uu9ZqQI3bOXqYTmVGIlLxZlbARr7gJT39uTaQNlZSQLtTIb5AqEAb axkg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=awGtDl62glKTvTBCE4i4fEhmTFdGWhWh/KYVIWG24Uk=; b=EGYNWTVEQ8PsCpmQhwLsVGYC9DQKwgUuT5nWPwJeKQGktLttXbNZoG4QCSGFWFXbIm 7YHFCh1LxRXUFUBNAxZpeaJcusi3wwNAlK6LuVMyMOwbFvAVMAOTMT9ULX7K8rySdJX3 W6Hb+lUKNmoIcBRs9pLPaefBu0gnV5Fk4vX0+Sfbt6PmhnVkoNVy73yqXRHePoDF79Oy v9uTGRrpc8hI6p57v7ogw3v5WQ/JN/wE0xU1/WHntOA5RoL8vdf/lJbXIPHWNt7VGdg3 85gwfIohVHUmuOzNRz75YJisaVcgEoQxq5CPkSls+9fl4M9e0umwkcqJft0AIs6/TrNS 9afw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a2si4097383plt.229.2018.01.05.05.13.00; Fri, 05 Jan 2018 05:13:00 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751895AbeAENMr (ORCPT + 27 others); Fri, 5 Jan 2018 08:12:47 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:44724 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750880AbeAENMn (ORCPT ); Fri, 5 Jan 2018 08:12:43 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B08B91596; Fri, 5 Jan 2018 05:12:42 -0800 (PST) Received: from edgewater-inn.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 7EDDB3F6CF; Fri, 5 Jan 2018 05:12:42 -0800 (PST) Received: by edgewater-inn.cambridge.arm.com (Postfix, from userid 1000) id EB2101AE17AB; Fri, 5 Jan 2018 13:12:42 +0000 (GMT) From: Will Deacon To: linux-arm-kernel@lists.infradead.org Cc: catalin.marinas@arm.com, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, lorenzo.pieralisi@arm.com, christoffer.dall@linaro.org, linux-kernel@vger.kernel.org, labbott@redhat.com, Will Deacon Subject: [PATCH v2 01/11] arm64: use RET instruction for exiting the trampoline Date: Fri, 5 Jan 2018 13:12:31 +0000 Message-Id: <1515157961-20963-2-git-send-email-will.deacon@arm.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1515157961-20963-1-git-send-email-will.deacon@arm.com> References: <1515157961-20963-1-git-send-email-will.deacon@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Speculation attacks against the entry trampoline can potentially resteer the speculative instruction stream through the indirect branch and into arbitrary gadgets within the kernel. This patch defends against these attacks by forcing a misprediction through the return stack: a dummy BL instruction loads an entry into the stack, so that the predicted program flow of the subsequent RET instruction is to a branch-to-self instruction which is finally resolved as a branch to the kernel vectors with speculation suppressed. Signed-off-by: Will Deacon --- arch/arm64/kernel/entry.S | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) -- 2.1.4 diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S index 031392ee5f47..71092ee09b6b 100644 --- a/arch/arm64/kernel/entry.S +++ b/arch/arm64/kernel/entry.S @@ -1029,6 +1029,14 @@ alternative_else_nop_endif .if \regsize == 64 msr tpidrro_el0, x30 // Restored in kernel_ventry .endif + /* + * Defend against branch aliasing attacks by pushing a dummy + * entry onto the return stack and using a RET instruction to + * entr the full-fat kernel vectors. + */ + bl 2f + b . +2: tramp_map_kernel x30 #ifdef CONFIG_RANDOMIZE_BASE adr x30, tramp_vectors + PAGE_SIZE @@ -1041,7 +1049,7 @@ alternative_insn isb, nop, ARM64_WORKAROUND_QCOM_FALKOR_E1003 msr vbar_el1, x30 add x30, x30, #(1b - tramp_vectors) isb - br x30 + ret .endm .macro tramp_exit, regsize = 64