From patchwork Sat Jan 6 01:10:09 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Williams X-Patchwork-Id: 123595 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp40697qgn; Fri, 5 Jan 2018 17:18:33 -0800 (PST) X-Google-Smtp-Source: ACJfBou39faF94SUgRLigPKTAX8oOzrjW7ad4VShosEpWcAggTaTHn6Phbv0rq+Ai1Fo7YzTLlob X-Received: by 10.84.133.226 with SMTP id f89mr4809444plf.407.1515201513175; Fri, 05 Jan 2018 17:18:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1515201513; cv=none; d=google.com; s=arc-20160816; b=00FDFYyT/0TiEg2poJGXVYVvW0N5A7xzPhWVqT6toeIXdZ8jqPg+v3sdHiOOxIlhba X8G4LGfdHIMyfbD0YhxK1+Gg3kPbW8JD0aeL4Lj/XETtYyLBb0erH3jWoTwW/unHLyWq 7ucSamUR14GUjSIIC/RnmOUvk+gsZNAnloJ2y1c5FZncj+pLoO6KuaMXkkCHsmWRe6A6 bHqfG5t5w8/eMuKSQQnVuD5GhC95oRRssPZ6FhiZqUvIk9dWAGbpbp1mhNppWxqLMtDV LIlqYT6xAPl5v1RwBlg+Uku71Tafe1pWKvhOpKBByQBvKKiCjcSnyV1OJXk9my9UhP5u eFRA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:cc:to:from :subject:arc-authentication-results; bh=O3BUN/+LDrqnRPf6nu5PF+cb+Z+R4oaAWxmNEYoItf4=; b=qdyjTYIk8zdEZ8a4v3BgZgA/wXJT76Vit2w/CUxVp78Jaa1Jj4B83bV+AWjdOHvn6s AUOER93p3gZROD/6rctyfVif8szrHojskKd6xSiNtr1a/qsTInXVxAIecaP+Ir/qrFqs 0ktrfc2uivl0oEHptC+hp5/KMEmBUuVB0xrcPDgnF49v45mWngthrFyzB/amdSFW7T9L M/OgyWuOnFVihvksXK0wYyM+f/UEJld5I1W+VTig5m4Y6OlsvJAgXsieBvHqfI7zwFdc Fne0ye7iHsoQY36BS6RErETVwkYxypr67ms5RASq7ewmvdO3h4KeqPEnoF+1JSMDGPEO 2w3g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v11si1903656pgf.326.2018.01.05.17.18.32; Fri, 05 Jan 2018 17:18:33 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753673AbeAFBSa (ORCPT + 28 others); Fri, 5 Jan 2018 20:18:30 -0500 Received: from mga06.intel.com ([134.134.136.31]:15560 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753640AbeAFBSY (ORCPT ); Fri, 5 Jan 2018 20:18:24 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Jan 2018 17:18:23 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,320,1511856000"; d="scan'208";a="192645547" Received: from dwillia2-desk3.jf.intel.com (HELO dwillia2-desk3.amr.corp.intel.com) ([10.54.39.16]) by fmsmga005.fm.intel.com with ESMTP; 05 Jan 2018 17:18:22 -0800 Subject: [PATCH 03/18] arm64: implement nospec_ptr() From: Dan Williams To: linux-kernel@vger.kernel.org Cc: Mark Rutland , linux-arch@vger.kernel.org, peterz@infradead.org, netdev@vger.kernel.org, Will Deacon , gregkh@linuxfoundation.org, tglx@linutronix.de, torvalds@linux-foundation.org, alan@linux.intel.com Date: Fri, 05 Jan 2018 17:10:09 -0800 Message-ID: <151520100890.32271.10501551400360324504.stgit@dwillia2-desk3.amr.corp.intel.com> In-Reply-To: <151520099201.32271.4677179499894422956.stgit@dwillia2-desk3.amr.corp.intel.com> References: <151520099201.32271.4677179499894422956.stgit@dwillia2-desk3.amr.corp.intel.com> User-Agent: StGit/0.17.1-9-g687f MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Mark Rutland This patch implements nospec_ptr() for arm64, following the recommended architectural sequence. Signed-off-by: Mark Rutland Signed-off-by: Will Deacon Cc: Dan Williams Cc: Peter Zijlstra Signed-off-by: Dan Williams --- arch/arm64/include/asm/barrier.h | 55 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/arch/arm64/include/asm/barrier.h b/arch/arm64/include/asm/barrier.h index 77651c49ef44..b4819f6a0e5c 100644 --- a/arch/arm64/include/asm/barrier.h +++ b/arch/arm64/include/asm/barrier.h @@ -40,6 +40,61 @@ #define dma_rmb() dmb(oshld) #define dma_wmb() dmb(oshst) +#define __load_no_speculate_n(ptr, lo, hi, failval, cmpptr, w, sz) \ +({ \ + typeof(*ptr) __nln_val; \ + typeof(*ptr) __failval = \ + (typeof(*ptr))(unsigned long)(failval); \ + \ + asm volatile ( \ + " cmp %[c], %[l]\n" \ + " ccmp %[c], %[h], 2, cs\n" \ + " b.cs 1f\n" \ + " ldr" #sz " %" #w "[v], %[p]\n" \ + "1: csel %" #w "[v], %" #w "[v], %" #w "[f], cc\n" \ + " hint #0x14 // CSDB\n" \ + : [v] "=&r" (__nln_val) \ + : [p] "m" (*(ptr)), [l] "r" (lo), [h] "r" (hi), \ + [f] "rZ" (__failval), [c] "r" (cmpptr) \ + : "cc"); \ + \ + __nln_val; \ +}) + +#define __load_no_speculate(ptr, lo, hi, failval, cmpptr) \ +({ \ + typeof(*(ptr)) __nl_val; \ + \ + switch (sizeof(__nl_val)) { \ + case 1: \ + __nl_val = __load_no_speculate_n(ptr, lo, hi, failval, \ + cmpptr, w, b); \ + break; \ + case 2: \ + __nl_val = __load_no_speculate_n(ptr, lo, hi, failval, \ + cmpptr, w, h); \ + break; \ + case 4: \ + __nl_val = __load_no_speculate_n(ptr, lo, hi, failval, \ + cmpptr, w, ); \ + break; \ + case 8: \ + __nl_val = __load_no_speculate_n(ptr, lo, hi, failval, \ + cmpptr, x, ); \ + break; \ + default: \ + BUILD_BUG(); \ + } \ + \ + __nl_val; \ +}) + +#define nospec_ptr(ptr, lo, hi) \ +({ \ + typeof(ptr) __np_ptr = (ptr); \ + __load_no_speculate(&__np_ptr, lo, hi, 0, __np_ptr); \ +}) + #define __smp_mb() dmb(ish) #define __smp_rmb() dmb(ishld) #define __smp_wmb() dmb(ishst)