From patchwork Fri Mar 30 09:44:12 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kunihiko Hayashi X-Patchwork-Id: 132592 Delivered-To: patch@linaro.org Received: by 10.46.84.29 with SMTP id i29csp2827953ljb; Fri, 30 Mar 2018 02:44:27 -0700 (PDT) X-Google-Smtp-Source: AIpwx4/yb98sn/qWdQKfquCvc8Cg10fRx+1VVgai0h/Q/KikuJ5/o95Yu3LoiTCiDkX2EVWZn0Xm X-Received: by 10.99.101.193 with SMTP id z184mr8180901pgb.429.1522403067595; Fri, 30 Mar 2018 02:44:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1522403067; cv=none; d=google.com; s=arc-20160816; b=YIkqtmmBuD26I7V99CO9HbeJCMmz4mt4HmRW94TfwY7TuVvV/4Fhza0nIrArOnr07y 5dsPbQV9sw6IkFZQHZJGEEvQlxyzQ1RnmJ1KJAiWCRk06lIeoW8bae2ZGQil8BNyQ8bS XLpw3MWu/tV/qt15E1W2IxxqkO91LZ8qgeMbDrjFvhct+IaamGu9zIpEYZvSPp/WVVcK ISoVSq8SvqfGVznQoxiOKzGjOynaT+YjpH6kO8y5WQBIL2s4Ai00ceqcI50dCNcOTyuk 2m+D+3VyQitqC2BB03BuOniKNDFgYAmexJuatzMzmCnAMugyYXFcuGfyjPXArGAlF+hn 53iQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=K5Mi4rsFFlVSWyde+8MuFGO5HOKZ0Sfvzr9WbeZWdHw=; b=UGU6WrXVMXcGeTrTK3aGbR3Afi6aR+X5B6hKcY8qSMVpA3XUqB8V8vMvOuUzxMEdyv w0wFnZn7ZfO8sxFbsLE3v0RFQctTp2vZMfIIBbG6ATxIlAFyt4Uay2ZA0HM1g3Zdg3sg ZtmB/FfsJoA1jcWPgigwNfNz5Xdt0bGQvXRr3EXhmIr+ehCQo+qIDyr+UbqjPLNDgJ0F Fsf4wQwXrzxsBrn3lGYY4+crz6E1b00oF4y6yQBhhezs1iJaJppjeQqUveo+v+eEjpQW 4YGJyvJ6jJ1DVf2qM9J6xmxsdnM6o5YoFFC+e6LWPLglCRP24K75kZca01dtud34Kcqk kENA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u7-v6si7968809plz.562.2018.03.30.02.44.27; Fri, 30 Mar 2018 02:44:27 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751297AbeC3JoX (ORCPT + 29 others); Fri, 30 Mar 2018 05:44:23 -0400 Received: from mx.socionext.com ([202.248.49.38]:52269 "EHLO mx.socionext.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751237AbeC3JoV (ORCPT ); Fri, 30 Mar 2018 05:44:21 -0400 Received: from unknown (HELO iyokan-ex.css.socionext.com) ([172.31.9.54]) by mx.socionext.com with ESMTP; 30 Mar 2018 18:44:20 +0900 Received: from mail.mfilter.local (m-filter-1 [10.213.24.61]) by iyokan-ex.css.socionext.com (Postfix) with ESMTP id 327F761885; Fri, 30 Mar 2018 18:44:20 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Fri, 30 Mar 2018 18:44:20 +0900 Received: from plum.e01.socionext.com (unknown [10.213.132.32]) by kinkan.css.socionext.com (Postfix) with ESMTP id EF1A61A0DEC; Fri, 30 Mar 2018 18:44:19 +0900 (JST) From: Kunihiko Hayashi To: Michael Turquette , Stephen Boyd , Masahiro Yamada , linux-clk@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Kunihiko Hayashi Subject: [PATCH 1/3] clk: uniphier: add PCIe clock control support Date: Fri, 30 Mar 2018 18:44:12 +0900 Message-Id: <1522403054-18691-2-git-send-email-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1522403054-18691-1-git-send-email-hayashi.kunihiko@socionext.com> References: <1522403054-18691-1-git-send-email-hayashi.kunihiko@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add clock control for PCIe controller on UniPhier SoCs. This adds support for Pro5, LD20 and PXs3. Signed-off-by: Kunihiko Hayashi --- drivers/clk/uniphier/clk-uniphier-sys.c | 3 +++ 1 file changed, 3 insertions(+) -- 2.7.4 Acked-by: Masahiro Yamada diff --git a/drivers/clk/uniphier/clk-uniphier-sys.c b/drivers/clk/uniphier/clk-uniphier-sys.c index fa7f2f3..d539c82 100644 --- a/drivers/clk/uniphier/clk-uniphier-sys.c +++ b/drivers/clk/uniphier/clk-uniphier-sys.c @@ -141,6 +141,7 @@ const struct uniphier_clk_data uniphier_pro5_sys_clk_data[] = { UNIPHIER_PRO4_SYS_CLK_GIO(12), /* PCIe, USB3 */ UNIPHIER_PRO4_SYS_CLK_USB3(14, 0), UNIPHIER_PRO4_SYS_CLK_USB3(15, 1), + UNIPHIER_CLK_GATE("pcie", 24, NULL, 0x2108, 2), UNIPHIER_PRO5_SYS_CLK_AIO(40), { /* sentinel */ } }; @@ -216,6 +217,7 @@ const struct uniphier_clk_data uniphier_ld20_sys_clk_data[] = { UNIPHIER_CLK_GATE("usb30", 14, NULL, 0x210c, 14), UNIPHIER_CLK_GATE("usb30-phy0", 16, NULL, 0x210c, 12), UNIPHIER_CLK_GATE("usb30-phy1", 17, NULL, 0x210c, 13), + UNIPHIER_CLK_GATE("pcie", 24, NULL, 0x210c, 4), UNIPHIER_LD11_SYS_CLK_AIO(40), UNIPHIER_LD11_SYS_CLK_EVEA(41), UNIPHIER_LD11_SYS_CLK_EXIV(42), @@ -254,6 +256,7 @@ const struct uniphier_clk_data uniphier_pxs3_sys_clk_data[] = { UNIPHIER_CLK_GATE("usb30-phy2", 18, NULL, 0x210c, 20), UNIPHIER_CLK_GATE("usb31-phy0", 20, NULL, 0x210c, 17), UNIPHIER_CLK_GATE("usb31-phy1", 21, NULL, 0x210c, 19), + UNIPHIER_CLK_GATE("pcie", 24, NULL, 0x210c, 3), /* CPU gears */ UNIPHIER_CLK_DIV4("cpll", 2, 3, 4, 8), UNIPHIER_CLK_DIV4("spll", 2, 3, 4, 8),