From patchwork Fri Mar 30 09:44:13 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kunihiko Hayashi X-Patchwork-Id: 132594 Delivered-To: patch@linaro.org Received: by 10.46.84.29 with SMTP id i29csp2828168ljb; Fri, 30 Mar 2018 02:44:48 -0700 (PDT) X-Google-Smtp-Source: AIpwx48DPrfX6EO6DXQO85fPLeUWZcIy6qNtgf5Eysjick3eaPES0L3a2UnJ+zX/iLAkopSgY+SY X-Received: by 10.98.223.16 with SMTP id u16mr9344783pfg.146.1522403088384; Fri, 30 Mar 2018 02:44:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1522403088; cv=none; d=google.com; s=arc-20160816; b=r1EA4A3GovpwOpSCtk1TylLzggY7wZ14UHPECm1Xc3c3xiHobqAL26L9km9y4EDga0 d21ZzRxDbVGJhTzpIFwdMPQgrh9RrQtPzeTzmPXpCSuMb+Dm9/obdj1M402CRAH1LASR LYuueUg9sJ0a9EFzVcRAAPFzCkwOqijwmIQ07ibQ7Q2sc7dm7YpDA41eTRTgI1yHg6QW VMfyf5h4ZojP52OVP7rerWA7baryyEyoSnv/EIzT4vUas5Dy4A/+wpkZa7nqBvR/w3hi sk4mJYXyc6FeiT7ZRW1VZ4qcXrRkbbjHCUavcJx8sj/gGb0onQbs2mSH0nAHMqvztOFE AjTQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=fAcVEyd/Bt/9hZckpSj04ZsA5lJ0VaH/2WMF83zmrO0=; b=POH4Nr76Y6IgwKcWi7c5AKbOFrQOp7ITfKQA71nsxGGVAmbPWk0WMQF6QZFAC5o3dZ Ym2ZH6V6OistHijgEzN+935GY+BU4CE52QiGwcSUOeV7VQgH/y5XGrxgYzy+/2JAsPZ8 bLEPaB+YiyE78Lzl0UExLTrWMq9Bxy1nrgXxcijAV6HFTeEZTOXzBJyqGEhwTko36zYf SDsjhnPMG4jdX+O8ERO8EY8bGET7KtVeNEu64iSmb5YJtALlFFEQGnIP/cAU6xRPEXJd 8hcHz257XAHCsnV4oA3MxlEtTZ9EMZP+ZHZXk9LPlvdeaGSQTs1lDwBvwLoLl1kr9BkU HkRw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x13si5882329pfm.281.2018.03.30.02.44.48; Fri, 30 Mar 2018 02:44:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751862AbeC3Jop (ORCPT + 29 others); Fri, 30 Mar 2018 05:44:45 -0400 Received: from mx.socionext.com ([202.248.49.38]:52269 "EHLO mx.socionext.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750794AbeC3JoX (ORCPT ); Fri, 30 Mar 2018 05:44:23 -0400 Received: from unknown (HELO iyokan-ex.css.socionext.com) ([172.31.9.54]) by mx.socionext.com with ESMTP; 30 Mar 2018 18:44:22 +0900 Received: from mail.mfilter.local (m-filter-1 [10.213.24.61]) by iyokan-ex.css.socionext.com (Postfix) with ESMTP id 4228261885; Fri, 30 Mar 2018 18:44:22 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Fri, 30 Mar 2018 18:44:22 +0900 Received: from plum.e01.socionext.com (unknown [10.213.132.32]) by kinkan.css.socionext.com (Postfix) with ESMTP id 971991A0DEC; Fri, 30 Mar 2018 18:44:21 +0900 (JST) From: Kunihiko Hayashi To: Michael Turquette , Stephen Boyd , Masahiro Yamada , linux-clk@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Kunihiko Hayashi Subject: [PATCH 2/3] clk: uniphier: add SATA clock control support Date: Fri, 30 Mar 2018 18:44:13 +0900 Message-Id: <1522403054-18691-3-git-send-email-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1522403054-18691-1-git-send-email-hayashi.kunihiko@socionext.com> References: <1522403054-18691-1-git-send-email-hayashi.kunihiko@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add clock control for SATA controller on UniPhier SoCs. This adds support for PXs2, LD20 and PXs3. Signed-off-by: Kunihiko Hayashi --- drivers/clk/uniphier/clk-uniphier-sys.c | 6 ++++++ 1 file changed, 6 insertions(+) -- 2.7.4 Acked-by: Masahiro Yamada diff --git a/drivers/clk/uniphier/clk-uniphier-sys.c b/drivers/clk/uniphier/clk-uniphier-sys.c index d539c82..7d66dfb 100644 --- a/drivers/clk/uniphier/clk-uniphier-sys.c +++ b/drivers/clk/uniphier/clk-uniphier-sys.c @@ -112,6 +112,8 @@ const struct uniphier_clk_data uniphier_pro4_sys_clk_data[] = { UNIPHIER_PRO4_SYS_CLK_GIO(12), /* Ether, SATA, USB3 */ UNIPHIER_PRO4_SYS_CLK_USB3(14, 0), UNIPHIER_PRO4_SYS_CLK_USB3(15, 1), + UNIPHIER_CLK_GATE("sata0", 28, NULL, 0x2104, 18), + UNIPHIER_CLK_GATE("sata1", 29, NULL, 0x2104, 19), UNIPHIER_PRO4_SYS_CLK_AIO(40), { /* sentinel */ } }; @@ -160,6 +162,7 @@ const struct uniphier_clk_data uniphier_pxs2_sys_clk_data[] = { /* The document mentions 0x2104 bit 18, but not functional */ UNIPHIER_CLK_GATE("usb30-phy", 16, NULL, 0x2104, 19), UNIPHIER_CLK_GATE("usb31-phy", 20, NULL, 0x2104, 20), + UNIPHIER_CLK_GATE("sata0", 28, NULL, 0x2104, 22), UNIPHIER_PRO5_SYS_CLK_AIO(40), { /* sentinel */ } }; @@ -257,6 +260,9 @@ const struct uniphier_clk_data uniphier_pxs3_sys_clk_data[] = { UNIPHIER_CLK_GATE("usb31-phy0", 20, NULL, 0x210c, 17), UNIPHIER_CLK_GATE("usb31-phy1", 21, NULL, 0x210c, 19), UNIPHIER_CLK_GATE("pcie", 24, NULL, 0x210c, 3), + UNIPHIER_CLK_GATE("sata0", 28, NULL, 0x210c, 7), + UNIPHIER_CLK_GATE("sata1", 29, NULL, 0x210c, 8), + UNIPHIER_CLK_GATE("sata-phy", 30, NULL, 0x210c, 21), /* CPU gears */ UNIPHIER_CLK_DIV4("cpll", 2, 3, 4, 8), UNIPHIER_CLK_DIV4("spll", 2, 3, 4, 8),