From patchwork Wed Apr 11 18:01:13 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 133163 Delivered-To: patch@linaro.org Received: by 10.46.84.29 with SMTP id i29csp896915ljb; Wed, 11 Apr 2018 11:03:00 -0700 (PDT) X-Google-Smtp-Source: AIpwx49vB+mvFYxOlw4ylDZXdMjN36HU7dzAVZbUMN+PM5XqYEzasKsL5k2eDpELn0xd8z0igF7T X-Received: by 2002:a17:902:2b84:: with SMTP id l4-v6mr6290449plb.65.1523469780048; Wed, 11 Apr 2018 11:03:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1523469780; cv=none; d=google.com; s=arc-20160816; b=1K/8A3qj4xuD/Q/y1UhwhnsnY0U1PUQI8nM7WzDzqzp+nXfWnqS1dCPkHTvFlitZUB xFOtmw8PWP2GNxHp0ZE4sxhl9dk0R3QxMGiyf+JEzP2nqMDQTuY9P1aXPyl3aHKnAeiS Er7jyziTRuyALIB93RBXRYwg8bWSJJEp1ukJy34Wp/mh7JxlcNslM6frRowrL3EDqqnV qWZoooKbTDy9TVlAmB3ST7WWkQthC1UG4VlzQ0zlM2JMEXdT2/mgCWl2rADwOdMtuwzH jMlLnIarmLbpejl5ojvwypC/5DqxfVPlh4Puaiq9CUtBvl+tjb3INC7ZqToCaS0GyQd9 P2Rg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=8XpX1C6Q4iwZGgJB7HSRDSsXSUOB7Uj4yn14t9Dkl7o=; b=0TBr+uyX/OM243GUve/XhJiUg+bBudrOBuB4etB+NjBxWwPEcIjwE/CkC8Rc68+iPb 6PqxBH4tQgh1sQBWaoXT1iqdgJT2jaG0NBrmUTaG0DLx6HDtFUszeknx+W38DagzD0rs VaPstKDsqEbevOhJc7dYtFhbW3SRh6SmUmQMgUv4ZY9PGNHgnAGfuUGKuMgE1n81Fdg+ JcxTO9TH2pp6tesLwfH+a4Pt/62T6AQHUA1sT1wWLcHCKZZtS0QPV7tbbtqvRMbFziFg xhBGmvQuoP4CBe/SZhv4WKKxJHzl8YlFpBH6kkBdLaKu/qNGNTuEMm+/dL9Ax8J+Moil Ooxg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p12-v6si1686221plr.131.2018.04.11.11.02.59; Wed, 11 Apr 2018 11:03:00 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754122AbeDKSC5 (ORCPT + 29 others); Wed, 11 Apr 2018 14:02:57 -0400 Received: from foss.arm.com ([217.140.101.70]:52130 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752591AbeDKSBH (ORCPT ); Wed, 11 Apr 2018 14:01:07 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0E3CD165C; Wed, 11 Apr 2018 11:01:07 -0700 (PDT) Received: from edgewater-inn.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id D3E7D3F5B1; Wed, 11 Apr 2018 11:01:06 -0700 (PDT) Received: by edgewater-inn.cambridge.arm.com (Postfix, from userid 1000) id A47E91AE55BF; Wed, 11 Apr 2018 19:01:21 +0100 (BST) From: Will Deacon To: linux-kernel@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, peterz@infradead.org, mingo@kernel.org, boqun.feng@gmail.com, paulmck@linux.vnet.ibm.com, longman@redhat.com, Will Deacon Subject: [PATCH v2 06/13] locking/qspinlock: Use atomic_cond_read_acquire Date: Wed, 11 Apr 2018 19:01:13 +0100 Message-Id: <1523469680-17699-7-git-send-email-will.deacon@arm.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1523469680-17699-1-git-send-email-will.deacon@arm.com> References: <1523469680-17699-1-git-send-email-will.deacon@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Rather than dig into the counter field of the atomic_t inside the qspinlock structure so that we can call smp_cond_load_acquire, use atomic_cond_read_acquire instead, which operates on the atomic_t directly. Cc: Peter Zijlstra Cc: Ingo Molnar Signed-off-by: Will Deacon --- kernel/locking/qspinlock.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) -- 2.1.4 diff --git a/kernel/locking/qspinlock.c b/kernel/locking/qspinlock.c index 01b660442d87..648a16a2cd23 100644 --- a/kernel/locking/qspinlock.c +++ b/kernel/locking/qspinlock.c @@ -377,8 +377,8 @@ void queued_spin_lock_slowpath(struct qspinlock *lock, u32 val) * barriers. */ if (val & _Q_LOCKED_MASK) { - smp_cond_load_acquire(&lock->val.counter, - !(VAL & _Q_LOCKED_MASK)); + atomic_cond_read_acquire(&lock->val, + !(VAL & _Q_LOCKED_MASK)); } /* @@ -481,8 +481,8 @@ void queued_spin_lock_slowpath(struct qspinlock *lock, u32 val) * * The PV pv_wait_head_or_lock function, if active, will acquire * the lock and return a non-zero value. So we have to skip the - * smp_cond_load_acquire() call. As the next PV queue head hasn't been - * designated yet, there is no way for the locked value to become + * atomic_cond_read_acquire() call. As the next PV queue head hasn't + * been designated yet, there is no way for the locked value to become * _Q_SLOW_VAL. So both the set_locked() and the * atomic_cmpxchg_relaxed() calls will be safe. * @@ -492,7 +492,7 @@ void queued_spin_lock_slowpath(struct qspinlock *lock, u32 val) if ((val = pv_wait_head_or_lock(lock, node))) goto locked; - val = smp_cond_load_acquire(&lock->val.counter, !(VAL & _Q_LOCKED_PENDING_MASK)); + val = atomic_cond_read_acquire(&lock->val, !(VAL & _Q_LOCKED_PENDING_MASK)); locked: /* @@ -509,7 +509,7 @@ void queued_spin_lock_slowpath(struct qspinlock *lock, u32 val) /* In the PV case we might already have _Q_LOCKED_VAL set */ if ((val & _Q_TAIL_MASK) == tail) { /* - * The smp_cond_load_acquire() call above has provided the + * The atomic_cond_read_acquire() call above has provided the * necessary acquire semantics required for locking. */ old = atomic_cmpxchg_relaxed(&lock->val, val, _Q_LOCKED_VAL);