From patchwork Thu Apr 26 10:34:21 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 134477 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp2080745lji; Thu, 26 Apr 2018 03:35:47 -0700 (PDT) X-Google-Smtp-Source: AIpwx49V+WWinZgo5BFPky4lZruosQ3je+omfEvcET1otPC14OYH7NRC7fCyez9Ma7mVYSQRDRLJ X-Received: by 10.98.33.28 with SMTP id h28mr31006508pfh.249.1524738947677; Thu, 26 Apr 2018 03:35:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1524738947; cv=none; d=google.com; s=arc-20160816; b=J4Vulr9JdQnSfntv03hXi4ehnDjctt6jJMNUzV/Zj2Paz0WmKoYYZvwTsZuGaeRbh2 fFDy80qYh02BYwiUdkT0ghRjXyeFRWszMZxulyycrFQ9Wm/t5RMhIr+M4joVbW7o/Y1C qa0duVCRWciRcPq9vt97kOWhPn9qLSqmGXlj5eVqALirfPiWdRdcXPypn1Yqo9f/wP10 lN5tuubNnTaJ1FXBaFYpAFsiMF1EbmgfGoUCcjeqdPiN4qX4h7ZsVPQBY9T4kc8VYHWS c49/J6vyXpgxDgTHSvgDzDmnjvOgrcunmAXGckoY74/PFcSjnlphmjOhDvkjrMW/URiu XnJA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=m/V2x5qi+RwKCLq34kHqvJu5qr8/9ix8BbKKox06C48=; b=FDqwN043sXJkkJlEt7AISK+6csUio70Ojd6xyVgoBptIDlPqcB+RN/KzuyHDYwEdLV 88OqdYBXm5QzF5XzZt6R1UgWrlbcYbHwZL8Zhbleq95jx1TGHNFTiH+N80gA3BEI19Rw kErK+wDhBRJQEl6MgAq7YQL3v6BVXWIqwzN5prVZFmSh+z7vRMamc22irN1riI9T8dIe +k6uLizIL6u0iopy6FLCaroHWoy4OQo1CeDjXkoHOITx/Z7DLfx7RiHJ6EDXw1b2dkVn ixu3uKgAoUqyM8Gz5WUHbE9mQG3DHCofzZz4yQaGoCF8R0xeywSFmZISIBWdD1PHCANT HSzQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z188si15700603pgb.134.2018.04.26.03.35.47; Thu, 26 Apr 2018 03:35:47 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755810AbeDZKfp (ORCPT + 29 others); Thu, 26 Apr 2018 06:35:45 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:51078 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755108AbeDZKeK (ORCPT ); Thu, 26 Apr 2018 06:34:10 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 56FF416EA; Thu, 26 Apr 2018 03:34:10 -0700 (PDT) Received: from edgewater-inn.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 26DDD3F5B7; Thu, 26 Apr 2018 03:34:10 -0700 (PDT) Received: by edgewater-inn.cambridge.arm.com (Postfix, from userid 1000) id 4F9DF1AE5152; Thu, 26 Apr 2018 11:34:29 +0100 (BST) From: Will Deacon To: linux-kernel@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, peterz@infradead.org, mingo@kernel.org, boqun.feng@gmail.com, paulmck@linux.vnet.ibm.com, longman@redhat.com, will.deacon@arm.com Subject: [PATCH v3 07/14] locking/qspinlock: Use atomic_cond_read_acquire Date: Thu, 26 Apr 2018 11:34:21 +0100 Message-Id: <1524738868-31318-8-git-send-email-will.deacon@arm.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1524738868-31318-1-git-send-email-will.deacon@arm.com> References: <1524738868-31318-1-git-send-email-will.deacon@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Rather than dig into the counter field of the atomic_t inside the qspinlock structure so that we can call smp_cond_load_acquire, use atomic_cond_read_acquire instead, which operates on the atomic_t directly. Cc: Peter Zijlstra Cc: Ingo Molnar Signed-off-by: Will Deacon --- kernel/locking/qspinlock.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) -- 2.1.4 diff --git a/kernel/locking/qspinlock.c b/kernel/locking/qspinlock.c index e42f50d69ed6..5e383cfe4cce 100644 --- a/kernel/locking/qspinlock.c +++ b/kernel/locking/qspinlock.c @@ -337,8 +337,8 @@ void queued_spin_lock_slowpath(struct qspinlock *lock, u32 val) * barriers. */ if (val & _Q_LOCKED_MASK) { - smp_cond_load_acquire(&lock->val.counter, - !(VAL & _Q_LOCKED_MASK)); + atomic_cond_read_acquire(&lock->val, + !(VAL & _Q_LOCKED_MASK)); } /* @@ -441,8 +441,8 @@ void queued_spin_lock_slowpath(struct qspinlock *lock, u32 val) * * The PV pv_wait_head_or_lock function, if active, will acquire * the lock and return a non-zero value. So we have to skip the - * smp_cond_load_acquire() call. As the next PV queue head hasn't been - * designated yet, there is no way for the locked value to become + * atomic_cond_read_acquire() call. As the next PV queue head hasn't + * been designated yet, there is no way for the locked value to become * _Q_SLOW_VAL. So both the set_locked() and the * atomic_cmpxchg_relaxed() calls will be safe. * @@ -452,7 +452,7 @@ void queued_spin_lock_slowpath(struct qspinlock *lock, u32 val) if ((val = pv_wait_head_or_lock(lock, node))) goto locked; - val = smp_cond_load_acquire(&lock->val.counter, !(VAL & _Q_LOCKED_PENDING_MASK)); + val = atomic_cond_read_acquire(&lock->val, !(VAL & _Q_LOCKED_PENDING_MASK)); locked: /* @@ -469,7 +469,7 @@ void queued_spin_lock_slowpath(struct qspinlock *lock, u32 val) /* In the PV case we might already have _Q_LOCKED_VAL set */ if ((val & _Q_TAIL_MASK) == tail) { /* - * The smp_cond_load_acquire() call above has provided the + * The atomic_cond_read_acquire() call above has provided the * necessary acquire semantics required for locking. */ old = atomic_cmpxchg_relaxed(&lock->val, val, _Q_LOCKED_VAL);