From patchwork Tue May 1 14:51:28 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudeep Holla X-Patchwork-Id: 134784 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp5044310lji; Tue, 1 May 2018 07:51:50 -0700 (PDT) X-Google-Smtp-Source: AB8JxZobXTRBSUEVBSr7cmVTGHY4DtKRNm59vphJuhVeQcPWHzsB0Ii2+ZVUelQ++lTY++f2DmHl X-Received: by 2002:a17:902:164:: with SMTP id 91-v6mr16658798plb.134.1525186310568; Tue, 01 May 2018 07:51:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1525186310; cv=none; d=google.com; s=arc-20160816; b=HwzxVuHDJfqWGAorgkvZVzKZmOD4/t3shNHGx083VGd2erTlvgQKgCWDSVKKCXAl5t G3OrMpoITQEXsAMi2f3zIcpLq4exM0/xjYkSj24I/n/KVDqVXNIvQvH8tEgELjzkkQ09 K+ufvtxbUUs8v8LGf51no5RB6OudtsOVWGcycsUaL6foBrzj+5ZbgnZrWxbUhTbWkSHd 92Vp/xLasKo+eHoO9HbR6qPekt4v+72hqpas1/9GJbhesbgpEkdDOj39H0705NkcBPu9 S97DskkdwnHII1a0ShJKiaes/rMvdjACLyOayqSBtjJgCdlhoeQ7202S7Y7uZs9IZwv9 pL6w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :arc-authentication-results; bh=VtVNhjg6+CKYwV2eFGfdLR88pdcxMYuISh2lX0EQ6bY=; b=RVhHrdxNu5k5qcO6dYxCfryJCLo7gi+F/e+xd5BvknCr4TewI9zhRjXPezL00abhZy R5mvtfTjzb8OQTKJedm/zOh2oMoTH21bLo9AoKcBQW9hHtqNKVeXn1LkoX8CYSlDxxZr 5WY9uE3leJ9Zz1OHA7TrrvNMRpj79xzdbojo4q8vtv1GHsn1v0rDTl/JB1Hi90ffHacU 2GPZwspuzFXhaz1Hh3MJydH9ZJ8F9B8udfdvfqXULOp9x0GJ2AEmTUIDy26ODJoeUF7H SY1+aUp9+IpIpe2d0V4OJmkDOGzRzNw0TyquW6zjz21tNjOP2Bo1U0AJwOPrWAprGVrG XGow== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m10-v6si7895258pge.245.2018.05.01.07.51.50; Tue, 01 May 2018 07:51:50 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755098AbeEAOvr (ORCPT + 29 others); Tue, 1 May 2018 10:51:47 -0400 Received: from foss.arm.com ([217.140.101.70]:48102 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752048AbeEAOvq (ORCPT ); Tue, 1 May 2018 10:51:46 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D79CE1435; Tue, 1 May 2018 07:51:45 -0700 (PDT) Received: from e107155-lin.cambridge.arm.com (e107155-lin.cambridge.arm.com [10.1.210.28]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 8332D3F25D; Tue, 1 May 2018 07:51:44 -0700 (PDT) From: Sudeep Holla To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, Will Wong , Sudeep Holla , Mark Rutland , Lorenzo Pieralisi Subject: [PATCH] firmware/psci: add support for SYSTEM_RESET2 Date: Tue, 1 May 2018 15:51:28 +0100 Message-Id: <1525186288-536-1-git-send-email-sudeep.holla@arm.com> X-Mailer: git-send-email 2.7.4 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org PSCI v1.1 introduced SYSTEM_RESET2 to allow both architectural resets where the semantics are described by the PSCI specification itself as well as vendor-specific resets. Currently only system warm reset semantics is defined as part of architectural resets by the specification. This patch implements support for SYSTEM_RESET2 by making using of reboot_mode passed by the reboot infrastructure in the kernel. Cc: Mark Rutland Cc: Lorenzo Pieralisi Signed-off-by: Sudeep Holla --- drivers/firmware/psci.c | 21 +++++++++++++++++++++ include/uapi/linux/psci.h | 2 ++ 2 files changed, 23 insertions(+) -- 2.7.4 diff --git a/drivers/firmware/psci.c b/drivers/firmware/psci.c index c80ec1d03274..216b1950bbd5 100644 --- a/drivers/firmware/psci.c +++ b/drivers/firmware/psci.c @@ -88,6 +88,7 @@ static u32 psci_function_id[PSCI_FN_MAX]; PSCI_1_0_EXT_POWER_STATE_TYPE_MASK) static u32 psci_cpu_suspend_feature; +bool psci_system_reset2_supported; static inline bool psci_has_ext_power_state(void) { @@ -253,6 +254,15 @@ static int get_set_conduit_method(struct device_node *np) static void psci_sys_reset(enum reboot_mode reboot_mode, const char *cmd) { + if ((reboot_mode == REBOOT_WARM || reboot_mode == REBOOT_SOFT) && + psci_system_reset2_supported) + /* + * reset_type[31] = 0 (architectural) + * reset_type[30:0] = 0 (SYSTEM_WARM_RESET) + * cookie = 0 (ignored by the implementation + */ + invoke_psci_fn(PSCI_FN_NATIVE(1_1, SYSTEM_RESET2), 0, 0, 0); + invoke_psci_fn(PSCI_0_2_FN_SYSTEM_RESET, 0, 0, 0); } @@ -451,6 +461,16 @@ static const struct platform_suspend_ops psci_suspend_ops = { .enter = psci_system_suspend_enter, }; +static void __init psci_init_system_reset2(void) +{ + int ret; + + ret = psci_features(PSCI_FN_NATIVE(1_1, SYSTEM_RESET2)); + + if (ret != PSCI_RET_NOT_SUPPORTED) + psci_system_reset2_supported = true; +} + static void __init psci_init_system_suspend(void) { int ret; @@ -588,6 +608,7 @@ static int __init psci_probe(void) psci_init_smccc(); psci_init_cpu_suspend(); psci_init_system_suspend(); + psci_init_system_reset2(); } return 0; diff --git a/include/uapi/linux/psci.h b/include/uapi/linux/psci.h index b3bcabe380da..5b0ba0062541 100644 --- a/include/uapi/linux/psci.h +++ b/include/uapi/linux/psci.h @@ -49,8 +49,10 @@ #define PSCI_1_0_FN_PSCI_FEATURES PSCI_0_2_FN(10) #define PSCI_1_0_FN_SYSTEM_SUSPEND PSCI_0_2_FN(14) +#define PSCI_1_1_FN_SYSTEM_RESET2 PSCI_0_2_FN(18) #define PSCI_1_0_FN64_SYSTEM_SUSPEND PSCI_0_2_FN64(14) +#define PSCI_1_1_FN64_SYSTEM_RESET2 PSCI_0_2_FN64(18) /* PSCI v0.2 power state encoding for CPU_SUSPEND function */ #define PSCI_0_2_POWER_STATE_ID_MASK 0xffff