From patchwork Fri Jul 20 08:37:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 142461 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp2689679ljj; Fri, 20 Jul 2018 01:38:47 -0700 (PDT) X-Google-Smtp-Source: AAOMgpdlUzSkwq0evswej+LsRdHzdWsiceGBTbe9X+RewNQzShp8cpny/5wWXtCZOflenGPLkNPW X-Received: by 2002:a65:450a:: with SMTP id n10-v6mr1154183pgq.392.1532075927511; Fri, 20 Jul 2018 01:38:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532075927; cv=none; d=google.com; s=arc-20160816; b=gmp4QPndX1Q6le0qGSuZM6D3snEdQF3sVuIS2T77vfv0AwTGsUvL4G/bLFziwho0GK k1ipgKFmgPvorDn4vHbsLe2ohO3aAolCbz6cWXt5Ofw2i7r4PXZx+GcvMgaY/VOmspmo Z+LBEM3WxZ8tcIVz0gTehblhCgVFWU1L1gnGxzlYf5pdsPT85o/XnoFagZAvgwNwsHdy CHDIV23sw97Kymxig0NcVFw+BJsV87PjHfPDH4zlfwzoO3Tw52srILAWj9EpT5j20gaL x2hDG7czo1lzdssGHTIyT4HsWdhDyb+a6LU0VWUlqEdcpsuDmqkLZuBnyO1rujY5ElcT izsQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:dkim-filter :arc-authentication-results; bh=kZelxrNbnkFsoSoacE5LeX3IuKxIkJo7Gpnk/hgVBCQ=; b=dPxZPqL0WDkktebyDK6/fG6xGlNeVe+2rUsNrjugsswbcTlElhAP+s0fihmYll+wzx 30H9laizbjbFS/fPi4xTB+MyKB2tKqNobnQWPLNYOwyeDeKv/s0y+JFG7bfLGWMp2t3p D9jlRe57zBmM0klPK588McwlSM6hMk3XvDJbJpdpFQzKvA4UmwUCRsYa7FXLR9/fCh+E VPEfuP+LEYZoYKOmFkO6XdgdKHN+935pFWk3mBwSmwk+HWtzHQf6QtDRIx30Y4Q8P9Qb WvEVnIZAbMsXan+lf9iEiTCfZCmhnKSYGg2BVrOv1OnMrt1SUw0BopZplaLS+hfTqegU Wstg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=gqMMoC3D; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q145-v6si1402245pfq.315.2018.07.20.01.38.47; Fri, 20 Jul 2018 01:38:47 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=gqMMoC3D; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728291AbeGTJZz (ORCPT + 31 others); Fri, 20 Jul 2018 05:25:55 -0400 Received: from conuserg-07.nifty.com ([210.131.2.74]:18157 "EHLO conuserg-07.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727347AbeGTJZy (ORCPT ); Fri, 20 Jul 2018 05:25:54 -0400 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-07.nifty.com with ESMTP id w6K8bg69025961; Fri, 20 Jul 2018 17:37:43 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-07.nifty.com w6K8bg69025961 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1532075863; bh=kZelxrNbnkFsoSoacE5LeX3IuKxIkJo7Gpnk/hgVBCQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=gqMMoC3D+NHJ+1XZU4ln9XWX6GoR8AGDjlsh84VH2NNDOdpnxLyk9BU8Sfgp+tzmD Gd+SjXNccsKgYWhbmRBcnRLt1I6WWz92K2wlYnJpW0gYsaKkA9nxxrt7UBPf/qbykB cSY3i1lzsKfjKhdEHuDkM8aT4P/dhgNTZAyTu8OUQTSR4cplvd2O1nhttI8lI1x/6k 8Ev61DM1G1jWQsFGnOsGPLtCZ9pkd2KlOtLkqSZMnNXZ5MzryJSv6Y/AmI5jeapPvC NWKKkx63rf6bz2WJE6KAkrmEGjTJzDvYVFcBrBk5Yt3IZwnGD34G8d6QneHFxmgv+e Oik8kQUrw0/lQ== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: linux-clk@vger.kernel.org, Stephen Boyd Cc: Masami Hiramatsu , Jassi Brar , Kunihiko Hayashi , Masahiro Yamada , Michael Turquette , Stephen Boyd , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/2] clk: uniphier: add more USB3 PHY clocks Date: Fri, 20 Jul 2018 17:37:36 +0900 Message-Id: <1532075856-1723-2-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1532075856-1723-1-git-send-email-yamada.masahiro@socionext.com> References: <1532075856-1723-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add USB3 PHY clocks where missing. Use fixed-factor clocks for those without gating. For clarification, prefix clock names with 'ss' or 'hs'. Signed-off-by: Masahiro Yamada --- drivers/clk/uniphier/clk-uniphier-sys.c | 26 +++++++++++++++++--------- 1 file changed, 17 insertions(+), 9 deletions(-) -- 2.7.4 diff --git a/drivers/clk/uniphier/clk-uniphier-sys.c b/drivers/clk/uniphier/clk-uniphier-sys.c index a582446..1c5a998 100644 --- a/drivers/clk/uniphier/clk-uniphier-sys.c +++ b/drivers/clk/uniphier/clk-uniphier-sys.c @@ -122,6 +122,9 @@ const struct uniphier_clk_data uniphier_pro4_sys_clk_data[] = { UNIPHIER_PRO4_SYS_CLK_GIO(12), /* Ether, SATA, USB3 */ UNIPHIER_PRO4_SYS_CLK_USB3(14, 0), UNIPHIER_PRO4_SYS_CLK_USB3(15, 1), + UNIPHIER_CLK_FACTOR("usb30-hsphy0", 16, "upll", 1, 12), + UNIPHIER_CLK_FACTOR("usb30-ssphy0", 17, "ref", 1, 1), + UNIPHIER_CLK_FACTOR("usb31-ssphy0", 20, "ref", 1, 1), UNIPHIER_CLK_GATE("sata0", 28, NULL, 0x2104, 18), UNIPHIER_CLK_GATE("sata1", 29, NULL, 0x2104, 19), UNIPHIER_PRO4_SYS_CLK_AIO(40), @@ -173,8 +176,11 @@ const struct uniphier_clk_data uniphier_pxs2_sys_clk_data[] = { UNIPHIER_PRO4_SYS_CLK_USB3(14, 0), UNIPHIER_PRO4_SYS_CLK_USB3(15, 1), /* The document mentions 0x2104 bit 18, but not functional */ - UNIPHIER_CLK_GATE("usb30-phy", 16, NULL, 0x2104, 19), - UNIPHIER_CLK_GATE("usb31-phy", 20, NULL, 0x2104, 20), + UNIPHIER_CLK_GATE("usb30-hsphy0", 16, NULL, 0x2104, 19), + UNIPHIER_CLK_FACTOR("usb30-ssphy0", 17, "ref", 1, 1), + UNIPHIER_CLK_FACTOR("usb30-ssphy1", 18, "ref", 1, 1), + UNIPHIER_CLK_GATE("usb31-hsphy0", 20, NULL, 0x2104, 20), + UNIPHIER_CLK_FACTOR("usb31-ssphy0", 21, "ref", 1, 1), UNIPHIER_CLK_GATE("sata0", 28, NULL, 0x2104, 22), UNIPHIER_PRO5_SYS_CLK_AIO(40), { /* sentinel */ } @@ -235,8 +241,10 @@ const struct uniphier_clk_data uniphier_ld20_sys_clk_data[] = { * We do not use bit 15 here. */ UNIPHIER_CLK_GATE("usb30", 14, NULL, 0x210c, 14), - UNIPHIER_CLK_GATE("usb30-phy0", 16, NULL, 0x210c, 12), - UNIPHIER_CLK_GATE("usb30-phy1", 17, NULL, 0x210c, 13), + UNIPHIER_CLK_GATE("usb30-hsphy0", 16, NULL, 0x210c, 12), + UNIPHIER_CLK_GATE("usb30-hsphy1", 17, NULL, 0x210c, 13), + UNIPHIER_CLK_FACTOR("usb30-ssphy0", 18, "ref", 1, 1), + UNIPHIER_CLK_FACTOR("usb30-ssphy1", 19, "ref", 1, 1), UNIPHIER_CLK_GATE("pcie", 24, NULL, 0x210c, 4), UNIPHIER_LD11_SYS_CLK_AIO(40), UNIPHIER_LD11_SYS_CLK_EVEA(41), @@ -272,11 +280,11 @@ const struct uniphier_clk_data uniphier_pxs3_sys_clk_data[] = { UNIPHIER_CLK_GATE("usb30", 12, NULL, 0x210c, 4), /* =GIO0 */ UNIPHIER_CLK_GATE("usb31-0", 13, NULL, 0x210c, 5), /* =GIO1 */ UNIPHIER_CLK_GATE("usb31-1", 14, NULL, 0x210c, 6), /* =GIO1-1 */ - UNIPHIER_CLK_GATE("usb30-phy0", 16, NULL, 0x210c, 16), - UNIPHIER_CLK_GATE("usb30-phy1", 17, NULL, 0x210c, 18), - UNIPHIER_CLK_GATE("usb30-phy2", 18, NULL, 0x210c, 20), - UNIPHIER_CLK_GATE("usb31-phy0", 20, NULL, 0x210c, 17), - UNIPHIER_CLK_GATE("usb31-phy1", 21, NULL, 0x210c, 19), + UNIPHIER_CLK_GATE("usb30-hsphy0", 16, NULL, 0x210c, 16), + UNIPHIER_CLK_GATE("usb30-ssphy0", 17, NULL, 0x210c, 18), + UNIPHIER_CLK_GATE("usb30-ssphy1", 18, NULL, 0x210c, 20), + UNIPHIER_CLK_GATE("usb31-hsphy0", 20, NULL, 0x210c, 17), + UNIPHIER_CLK_GATE("usb31-ssphy0", 21, NULL, 0x210c, 19), UNIPHIER_CLK_GATE("pcie", 24, NULL, 0x210c, 3), UNIPHIER_CLK_GATE("sata0", 28, NULL, 0x210c, 7), UNIPHIER_CLK_GATE("sata1", 29, NULL, 0x210c, 8),