From patchwork Fri Nov 9 01:42:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kunihiko Hayashi X-Patchwork-Id: 150599 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1565653ljp; Thu, 8 Nov 2018 17:42:24 -0800 (PST) X-Google-Smtp-Source: AJdET5fieLNzGgb75PNv+9FMYd0/Xpd4KVJYWH2wxuTT6XFL8TQQV/7e+cUOlOnkLAlmY/80JQxu X-Received: by 2002:a17:902:6e17:: with SMTP id u23-v6mr7042067plk.127.1541727744068; Thu, 08 Nov 2018 17:42:24 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1541727744; cv=none; d=google.com; s=arc-20160816; b=ZQ1MM+kgS4rNI8FBYr4jDn1K0cU4qrfObswoGA8l1H2p0C2Ij9+kdKpMVRUv2KbzI6 3cBSsq9819BX0AOHNMhMQ7l+LoqGnKW1NpCugJttLMR13WrsIlR2hlHGgejdeCvWyXAH oJYC9Lwea/R+JenBKMhHwNi0NfuMgJwCfuCtiabvptlz6Azwxpx6pjwLEmalVwoIlJM1 Ed03t0l+0jXlIJAmdNefke3fDC12ThA935KaupeULWc38uYB3nxo4x4yY4KSTSdbvsQI mcxJ+bWSjX+UbKF88LJAfz96JrRpz9Btqktg2A7EoDSa4iTiK3U872mwiJgVa1vMzeQN 78KQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=NRpQR1hWb1jKbQdDX53bity5FvAQJM4Rqwgfrusvx4Q=; b=tHNj1Qdc2pAEpnzG49Phqf1fBri5G1jCb4Q1fEu4bNAtUd0sjG4VQoOCLMvXFcexCp 3VhtKRsMYzuMMfdkYBehW4wVSGU2jda/EWyddtZyZRdDPm9pw/pFaoqFxqdmo+/B/3pf 51Qx5J3+xip5Y4Xcyv5Qnl5uJQVXprk9OET0PdgP4Gm5NrFa0rH3/0V/hYgMmJqfTOwN UGgn9TXW/jCdRBwdO+cJ4bH3qsviMOPJck1fP8SK2sBju9Wr6ilHF7QBUSiQxItaM/Le DKOKzgLov+R0O/eRO0wttB6EtiRZ2WsnkIT0RcdnO25Zyr65RViMPu2qgHOyH471BKLa v6fg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d37-v6si5788175plb.167.2018.11.08.17.42.23; Thu, 08 Nov 2018 17:42:24 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727786AbeKILUk (ORCPT + 32 others); Fri, 9 Nov 2018 06:20:40 -0500 Received: from mx.socionext.com ([202.248.49.38]:41458 "EHLO mx.socionext.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727743AbeKILUk (ORCPT ); Fri, 9 Nov 2018 06:20:40 -0500 Received: from unknown (HELO kinkan-ex.css.socionext.com) ([172.31.9.52]) by mx.socionext.com with ESMTP; 09 Nov 2018 10:42:20 +0900 Received: from mail.mfilter.local (m-filter-1 [10.213.24.61]) by kinkan-ex.css.socionext.com (Postfix) with ESMTP id 8BC35180D4F; Fri, 9 Nov 2018 10:42:20 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Fri, 9 Nov 2018 10:42:20 +0900 Received: from plum.e01.socionext.com (unknown [10.213.132.32]) by kinkan.css.socionext.com (Postfix) with ESMTP id DED7C1A1236; Fri, 9 Nov 2018 10:42:19 +0900 (JST) From: Kunihiko Hayashi To: Philipp Zabel , Rob Herring , Mark Rutland , Masahiro Yamada Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Masami Hiramatsu , Jassi Brar , Kunihiko Hayashi Subject: [PATCH 3/4] dt-bindings: reset: uniphier: Add AHCI core reset description Date: Fri, 9 Nov 2018 10:42:06 +0900 Message-Id: <1541727727-10821-4-git-send-email-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1541727727-10821-1-git-send-email-hayashi.kunihiko@socionext.com> References: <1541727727-10821-1-git-send-email-hayashi.kunihiko@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add compatible strings for reset control of AHCI core implemented in UniPhier SoCs. The reset control belongs to AHCI glue layer. Signed-off-by: Kunihiko Hayashi --- Documentation/devicetree/bindings/reset/uniphier-reset.txt | 3 +++ 1 file changed, 3 insertions(+) -- 2.7.4 diff --git a/Documentation/devicetree/bindings/reset/uniphier-reset.txt b/Documentation/devicetree/bindings/reset/uniphier-reset.txt index f63c511..ea00517 100644 --- a/Documentation/devicetree/bindings/reset/uniphier-reset.txt +++ b/Documentation/devicetree/bindings/reset/uniphier-reset.txt @@ -133,6 +133,9 @@ Required properties: "socionext,uniphier-pxs2-usb3-reset" - for PXs2 SoC USB3 "socionext,uniphier-ld20-usb3-reset" - for LD20 SoC USB3 "socionext,uniphier-pxs3-usb3-reset" - for PXs3 SoC USB3 + "socionext,uniphier-pro4-ahci-reset" - for Pro4 SoC AHCI + "socionext,uniphier-pxs2-ahci-reset" - for PXs2 SoC AHCI + "socionext,uniphier-pxs3-ahci-reset" - for PXs3 SoC AHCI - #reset-cells: Should be 1. - reg: Specifies offset and length of the register set for the device. - clocks: A list of phandles to the clock gate for the glue layer.