From patchwork Wed Mar 20 20:25:38 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Stultz X-Patchwork-Id: 160732 Delivered-To: patches@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp6693jan; Wed, 20 Mar 2019 13:25:46 -0700 (PDT) X-Received: by 2002:a65:6154:: with SMTP id o20mr2438467pgv.205.1553113546771; Wed, 20 Mar 2019 13:25:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1553113546; cv=none; d=google.com; s=arc-20160816; b=LwLTEyGavdXxNAUmF9mxC1SxTLLJQzFHODD97JHG4gg02+FHcA+fyuZS9VsLHRW9Cl Fc41JeG0HiHAAiBZOXzVM1IxOTT1dkf0l9fvsfLhDyKnURPbVakvMXlS2sR+Mmp6JuEz LlMST0T/l7LBewAOvrkyaonJNrr+XXzfcBgl7jqnfVH2efg3Z4QjEelS5MWYDPDq+S1e 5/ySeWWmatyVGQEjszkGIimorRgi5UZcMDM1Nqbu8vikahLm1WwkqZiduOhBGH9jPPiZ UMWLYzVzhry1uvm1LjiNSiwXu6xIHV/dfyjaFEQjzCrxz3wBpB4JuPQuX1pPpz1xWa7S EbGw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=eAdIcXOpcOR3wLEK4yruXkVpo6EckNrG1lSlt64OUZI=; b=dpwa0BSl9WdM+iRqI73VCINSXP4o4kf9+OK6THnnzkBYXI/kJCiLWDytFMky9MKFuL 0QfRSuuk1F3gacDKv0a9wB0vBqPEHjqTEMTUWJEPTsUdK8j8yRzDFA1Pa2UnEwnyGhzu kbdfh0/EKTdJju5H25lC+caRONq0iAGLza+C9vLV6c1wrYs2cpztcoDOkHx8sQOwurHT o/zk7mXWy1YRA6SQhFUdH+0T0iUfLy7PECvRQPPnrETIHjPCIWPPL8VjgI+4Yatrzd26 W5L/KjuMcA0nnsAAOBx0VeGaEv/gRv8Vh2uxINljA/RiUzgr2q4Rd76WqVhqNdSR8pql Gm6w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=gIzBRJzc; spf=pass (google.com: domain of john.stultz@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=john.stultz@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. [209.85.220.65]) by mx.google.com with SMTPS id e23sor3505870pgi.48.2019.03.20.13.25.46 for (Google Transport Security); Wed, 20 Mar 2019 13:25:46 -0700 (PDT) Received-SPF: pass (google.com: domain of john.stultz@linaro.org designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=gIzBRJzc; spf=pass (google.com: domain of john.stultz@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=john.stultz@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=eAdIcXOpcOR3wLEK4yruXkVpo6EckNrG1lSlt64OUZI=; b=gIzBRJzcM+k5r6H4u4+EmCE3SkWkBarn6xj+dfByEbYU7tyCwU8C8qRM8SuVpGSwwI nNWEdn4Y1qh6rTXdtp1RwtsToGSGVArL0l2IsBLMuig1aTa+NDPOZsObVCR0DWiBe3bg KBiF4CHp1gHIcKbIoB/Lquzlp/1Y+doko+byLhUG1GyuHD8/Zdk2qOZO3t+23Ma/WRD+ mMaDMQjMYyWj5SnCGo57GVIZ+XTbDUfy7IM6b/5XQx3uz5vPDntMxGGrELPt3VBf7uEo A0dtp8mzjiqSmhRuz54+EWjWc6EAhdFB3H9+RXfrAVBQW8OJ0o+Jer5+O/6Xaq/XZ/jP eFKQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=eAdIcXOpcOR3wLEK4yruXkVpo6EckNrG1lSlt64OUZI=; b=tHvh7JwgFq+47RT1Vf58KC6UEJcZBG+jpGMNoss2eTqIaDSjBULU20H/bZSClak13j MaPE/XfHkRd0x7Cf0VfgsSshKWH/9XQmk5ZGgf0tkD1gVIjVhz5BMxzu0d8nfOOBp6R2 pqD1nsFB/i+wuv/y5qw5BhqfuwUBM80XiHBwkd6pfV1qjrkofdeLul3sd8DScqPjTFRK Z5d1c60z1E7ULeO8VVo0POjeOWY/YpgbJgA8oQyDjgZVzHjd/kWtC17k/u3ANe/kfg4X gr9tM4WVZVdy0weyFcOCNR5pu8uMAgbbbkjCfrYpkGBdmJM1GZyDR2mmGCnH/tLRrQy6 RZ4Q== X-Gm-Message-State: APjAAAXfb9/Hn6kZIYBnwBwPm0vG3ft0TtZesKLn8whx/DLknCkelhIk z15Ueb7T7tPqmX3FfeuFZ/oqxJE0 X-Google-Smtp-Source: APXvYqx6PDtUYK1QEqYly0pizPEw5ZfEhXv7OAmY9NV/TFotUocn/4vIvwVyax2nNAujPSdtMxpjkg== X-Received: by 2002:a63:e801:: with SMTP id s1mr30451014pgh.378.1553113546379; Wed, 20 Mar 2019 13:25:46 -0700 (PDT) Return-Path: Received: from localhost.localdomain ([2601:1c2:680:1319:4e72:b9ff:fe99:466a]) by smtp.gmail.com with ESMTPSA id u187sm866338pfu.113.2019.03.20.13.25.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 20 Mar 2019 13:25:45 -0700 (PDT) From: John Stultz To: lkml Cc: John Stultz , Tanglei Han , Zhuangluan Su , Ryan Grachek , Manivannan Sadhasivam , Wei Xu , Rob Herring , Mark Rutland , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Subject: [PATCH 1/3] arm64: dts: hi3660: Add dma to uart nodes Date: Wed, 20 Mar 2019 13:25:38 -0700 Message-Id: <1553113540-28726-2-git-send-email-john.stultz@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1553113540-28726-1-git-send-email-john.stultz@linaro.org> References: <1553113540-28726-1-git-send-email-john.stultz@linaro.org> Try to add DMA support to the uart nodes following the assignments made in the dts from the victoria vendor kernel here: https://consumer.huawei.com/en/opensource/detail/?siteCode=worldwide&keywords=p10&fileType=openSourceSoftware&pageSize=10&curPage=1 Cc: Tanglei Han Cc: Zhuangluan Su Cc: Ryan Grachek Cc: Manivannan Sadhasivam Cc: Wei Xu Cc: Rob Herring Cc: Mark Rutland Cc: linux-arm-kernel@lists.infradead.org Cc: devicetree@vger.kernel.org Acked-by: Manivannan Sadhasivam Signed-off-by: John Stultz --- v3: * Remove dma enablment on uart0 which would use reserved channel 0 --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) -- 2.7.4 diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 2f19e0e..a3eeab1 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -478,6 +478,8 @@ compatible = "arm,pl011", "arm,primecell"; reg = <0x0 0xfdf00000 0x0 0x1000>; interrupts = ; + dma-names = "rx", "tx"; + dmas = <&dma0 2 &dma0 3>; clocks = <&crg_ctrl HI3660_CLK_GATE_UART1>, <&crg_ctrl HI3660_CLK_GATE_UART1>; clock-names = "uartclk", "apb_pclk"; @@ -490,6 +492,8 @@ compatible = "arm,pl011", "arm,primecell"; reg = <0x0 0xfdf03000 0x0 0x1000>; interrupts = ; + dma-names = "rx", "tx"; + dmas = <&dma0 4 &dma0 5>; clocks = <&crg_ctrl HI3660_CLK_GATE_UART2>, <&crg_ctrl HI3660_PCLK>; clock-names = "uartclk", "apb_pclk"; @@ -514,6 +518,8 @@ compatible = "arm,pl011", "arm,primecell"; reg = <0x0 0xfdf01000 0x0 0x1000>; interrupts = ; + dma-names = "rx", "tx"; + dmas = <&dma0 6 &dma0 7>; clocks = <&crg_ctrl HI3660_CLK_GATE_UART4>, <&crg_ctrl HI3660_CLK_GATE_UART4>; clock-names = "uartclk", "apb_pclk"; @@ -526,6 +532,8 @@ compatible = "arm,pl011", "arm,primecell"; reg = <0x0 0xfdf05000 0x0 0x1000>; interrupts = ; + dma-names = "rx", "tx"; + dmas = <&dma0 8 &dma0 9>; clocks = <&crg_ctrl HI3660_CLK_GATE_UART5>, <&crg_ctrl HI3660_CLK_GATE_UART5>; clock-names = "uartclk", "apb_pclk";