From patchwork Wed Aug 14 09:28:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhou Wang X-Patchwork-Id: 171250 Delivered-To: patch@linaro.org Received: by 2002:a92:d204:0:0:0:0:0 with SMTP id y4csp574468ily; Wed, 14 Aug 2019 02:31:05 -0700 (PDT) X-Google-Smtp-Source: APXvYqxx802WWQbbwc7Gdd2BgoXASk3KSdb/w2PhkMAPCoH9HlBjTfe/NATmmOFCdiju7nGV7m1x X-Received: by 2002:a17:90a:ec12:: with SMTP id l18mr6063896pjy.6.1565775065871; Wed, 14 Aug 2019 02:31:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1565775065; cv=none; d=google.com; s=arc-20160816; b=ALMhadiFdR1k3vbSan2M4NwnN0/iZ3/0uTh2SmSsQm8SEc7XBGBuU6YWWswzElXUwX DXTWIiadUba2Kc8EraWFoxdfvzlXfHkFYFOhs0X9lV49lXtAEzRXG7L0GyDBI6o761T9 184jxVVY4WU/8xZZoOjgp2mYxAIESfcdQp+LZFgUh9Ul4h+VBIVTHG2gHFYSTi2pVP3D ahkKMk0c9SBp0SBRkOwf59JYZ67EpQahybtRPS+Y74btzZYaCQ0TiXW1ocBimlJN2OGB tOeQfaHIss7kZ4J/bb29KzHvRqoyehl6B3CBQwuLr9iAaZtlm48rnEgoPKs0uJFhzYD9 fh6w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=Nmj+Twi/YwJC0OwBaLbbSkxGacWNjj7vAWkaGSXFVxA=; b=h2835MQS7TO0/c/tbnnqJ4wX/HDvi5DU+xz8Rc17SeK3T0fwvYXyjI/J2pAT1KZf1J ZxSkDYPqWpMqOIvYObJU15QHYu8d3WKGe666Zml3+FYpGpM9og8LB7s1XfVOS+yw2dfN sLjXbAfRrqt2LYyhnbAk+ybBzWW7dudokcOzCAlAvpyVOuETaaaRpHcqxmGfLX18lQKb y/qaG0UobADJew+obaupMJdct4sycggpXQMhgeFORjTvxfMGg1l1j0f71aiEHHFrhzKI GLqtaM7QA2iQzVJmYZtUwNS+Hh5qNdjDVpV9WYN+xTGuWlR6/O9diequDYIgMCSxWYim WHdQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 26si68924188pgs.520.2019.08.14.02.31.05; Wed, 14 Aug 2019 02:31:05 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727080AbfHNJbE (ORCPT + 28 others); Wed, 14 Aug 2019 05:31:04 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:44640 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726411AbfHNJa7 (ORCPT ); Wed, 14 Aug 2019 05:30:59 -0400 Received: from DGGEMS406-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 3A91F2AB08A1131FE742; Wed, 14 Aug 2019 17:30:56 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS406-HUB.china.huawei.com (10.3.19.206) with Microsoft SMTP Server id 14.3.439.0; Wed, 14 Aug 2019 17:30:49 +0800 From: Zhou Wang To: , CC: , , , Zhou Wang Subject: [PATCH 3/5] crypto: hisilicon - init curr_sgl_dma to fix compile warning Date: Wed, 14 Aug 2019 17:28:37 +0800 Message-ID: <1565774919-31853-4-git-send-email-wangzhou1@hisilicon.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1565774919-31853-1-git-send-email-wangzhou1@hisilicon.com> References: <1565774919-31853-1-git-send-email-wangzhou1@hisilicon.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Just init curr_sgl_dma = 0 to avoid compile warning. Fixes: dfed0098ab91 ("crypto: hisilicon - add hardware SGL support") Reported-by: kbuild test robot Signed-off-by: Zhou Wang --- drivers/crypto/hisilicon/sgl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.8.1 diff --git a/drivers/crypto/hisilicon/sgl.c b/drivers/crypto/hisilicon/sgl.c index 8ef7679..e083d17 100644 --- a/drivers/crypto/hisilicon/sgl.c +++ b/drivers/crypto/hisilicon/sgl.c @@ -150,7 +150,7 @@ hisi_acc_sg_buf_map_to_hw_sgl(struct device *dev, u32 index, dma_addr_t *hw_sgl_dma) { struct hisi_acc_hw_sgl *curr_hw_sgl; - dma_addr_t curr_sgl_dma; + dma_addr_t curr_sgl_dma = 0; struct acc_hw_sge *curr_hw_sge; struct scatterlist *sg; int sg_n = sg_nents(sgl);