From patchwork Wed Sep 4 15:54:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 172934 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:ce:0:0:0:0 with SMTP id r14csp115725ilq; Wed, 4 Sep 2019 08:57:31 -0700 (PDT) X-Google-Smtp-Source: APXvYqytQ5CmIN07Gd5mmBwneKrhxJEbPc8KJhr7r4XZEZg/NzhCMUGFU4DxBVAPNzJwTF10CJiJ X-Received: by 2002:a17:90a:c384:: with SMTP id h4mr5735709pjt.47.1567612651505; Wed, 04 Sep 2019 08:57:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1567612651; cv=none; d=google.com; s=arc-20160816; b=vdzB+vicJ+9TG6K3IW3+reQbpugHcnkaZlvm9zdQ6g1QmG9TiH6f/QZzo64LkA91BH 6awptGS5nS6U/i5F263InHRwWLxEIm70ky3hOnlsNw0fuT0qAh+Jcl/dmJxLTrITT6HT iQe4SYDvh8shCd11KXHEmD5iZtP1MWxFv0OKEsciZH4uBQOHOiLkEPxLvdhKVLRkWeYp N/MFRliesNlenN0yQ8oK/XzIKHEKUNZWQDGuZo2CdvJbbIvd/GqfpmR//Su+wF1BPicu jMGE3TfodHyVfn8KopAyTe9eVMuob/xJ27f0iH3Z/I8geTu18E73VTf/u59rGde60+lx pwDA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=vCiISrBTCGtLlQudhBjHP1dDHO//NE6Enn2mD2grqlA=; b=iE7MGnB/B0OgTh03VaQ6Uu9TakTU+FlNxp93gziKlvzDWwUW53LJFM6/+7u0WJc5H9 C2NR2fbf7u5QbtLGNTsEatMX+Fc6h/GrAAzz1+3U+FOlN/Hfg3ds804K3ppWsdYUXDug f8JvfzmPS2CED+RzimazZGvxQ5WrEgQtdZ+5YN7lLR/GTdCJP7j7Bewnj+6zZtve9Too 6iT4A02AvYlEi98eH4dYETEuyi52qrkQUUX3i8DOKF7OVYXmzSsoxnMmQ9hoqtStmtwC WQ1Sma74Ak6AHfn53ZG2nZtkHXYHuho64RvbEKJHa51JelnlxZWM+xiGScISQKCHpYEF olyg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j9si11737655plt.315.2019.09.04.08.57.31; Wed, 04 Sep 2019 08:57:31 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731503AbfIDP5V (ORCPT + 28 others); Wed, 4 Sep 2019 11:57:21 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:6666 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1730099AbfIDP5V (ORCPT ); Wed, 4 Sep 2019 11:57:21 -0400 Received: from DGGEMS413-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id EBA9669FD6A1B3ECFEBB; Wed, 4 Sep 2019 23:57:18 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS413-HUB.china.huawei.com (10.3.19.213) with Microsoft SMTP Server id 14.3.439.0; Wed, 4 Sep 2019 23:57:11 +0800 From: John Garry To: , , , , , CC: , , , , , John Garry Subject: [PATCH 1/4] perf jevents: Fix Hisi hip08 DDRC PMU eventname Date: Wed, 4 Sep 2019 23:54:41 +0800 Message-ID: <1567612484-195727-2-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1567612484-195727-1-git-send-email-john.garry@huawei.com> References: <1567612484-195727-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The "EventName" for the DDRC precharge command event is incorrect, so fix it. Fixes: 57cc732479ba ("perf jevents: Add support for Hisi hip08 DDRC PMU aliasing") Signed-off-by: John Garry --- .../perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.17.1 diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json index 0d1556fcdffe..99f4fc425564 100644 --- a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json +++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json @@ -15,7 +15,7 @@ }, { "EventCode": "0x04", - "EventName": "uncore_hisi_ddrc.flux_wr", + "EventName": "uncore_hisi_ddrc.pre_cmd", "BriefDescription": "DDRC precharge commands", "PublicDescription": "DDRC precharge commands", "Unit": "hisi_sccl,ddrc",