From patchwork Thu Dec 29 12:06:11 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 89286 Delivered-To: patch@linaro.org Received: by 10.140.20.101 with SMTP id 92csp6147090qgi; Thu, 29 Dec 2016 12:06:04 -0800 (PST) X-Received: by 10.98.4.134 with SMTP id 128mr41004454pfe.156.1483041964627; Thu, 29 Dec 2016 12:06:04 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id l4si54573215plb.98.2016.12.29.12.06.04; Thu, 29 Dec 2016 12:06:04 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750900AbcL2UGA (ORCPT + 25 others); Thu, 29 Dec 2016 15:06:00 -0500 Received: from mail-pg0-f41.google.com ([74.125.83.41]:35642 "EHLO mail-pg0-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750772AbcL2UF6 (ORCPT ); Thu, 29 Dec 2016 15:05:58 -0500 Received: by mail-pg0-f41.google.com with SMTP id i5so104752821pgh.2 for ; Thu, 29 Dec 2016 12:05:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=oOzBnxO8V9EE51LePO/Vb66OUPevOCl6f6ZYnZjsLpE=; b=iYnb5/+Yht3Wng3WM0tymQ87POEwXvuAxVpdWWLcEZrQoZR+UBdvvwXTfNgfRGjIUh jYsbXgJZqZESdbhkSBp9eJWJgeQnBEj7OL1DR10XSschaZui1R9YMVTzqtcOYgtb9gk0 FCCtHKKEwMMGjLqcr86etQgS4wH6bZdS51vt4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=oOzBnxO8V9EE51LePO/Vb66OUPevOCl6f6ZYnZjsLpE=; b=ogzqz9dJXlEZ9lPDYuHzqdRP1ERVAKhfEj+v6+Tcre3bGyVUnvB2w8YKFaDq8IP/3q dBrPXuuqkjhpUshsASDK1uNTG0wfLgIkuCeBYmBl5NlOKHaNMWPJkXxX3HNAnAoPaQ0/ 0/UPP2oZJhUKrfFD59i0Vmh8wfdr2uzWdO41kp9/G66KRGRKg0mqoLzkBH94j1DyZto2 e2JWqZPAgf2u5zSzhYqUg4iflVAR6bPGObb+jCt8S9Eu0YA7mV9SPXQcnMSeDAoPVzWS Q9kJNtVb8JCw0hnYI+rD5l4eSxy62ou5JhOKNm9XXbMwLgzZtHac1ciLLbarrNbpFAXB WJ6A== X-Gm-Message-State: AIkVDXL9+Uhrm5cGKgrgGIj2UsBF++8IXZSznbm0AymGJ+beROkfx5SSSdcj7NLbH1STcK8N X-Received: by 10.84.179.67 with SMTP id a61mr90065784plc.98.1483041958164; Thu, 29 Dec 2016 12:05:58 -0800 (PST) Received: from localhost.localdomain (ip68-111-223-48.sd.sd.cox.net. [68.111.223.48]) by smtp.gmail.com with ESMTPSA id r1sm58105206pgn.48.2016.12.29.12.05.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 29 Dec 2016 12:05:57 -0800 (PST) From: Bjorn Andersson To: Andy Gross , David Brown Cc: linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2] ARM: dts: qcom: apq8064: Add missing scm clock Date: Thu, 29 Dec 2016 04:06:11 -0800 Message-Id: <20161229120611.7948-1-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.11.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org As per the device tree binding the apq8064 scm node requires the core clock to be specified, so add this. Signed-off-by: Bjorn Andersson --- Changes since v1: - Changed clock to Daytona Fabric arch/arm/boot/dts/qcom-apq8064.dtsi | 4 ++++ 1 file changed, 4 insertions(+) -- 2.11.0 diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 1dbe697b2e90..a27cc96ac069 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -4,6 +4,7 @@ #include #include #include +#include #include #include #include @@ -303,6 +304,9 @@ firmware { scm { compatible = "qcom,scm-apq8064"; + + clocks = <&rpmcc RPM_DAYTONA_FABRIC_CLK>; + clock-names = "core"; }; };