From patchwork Wed Apr 5 09:06:34 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 96883 Delivered-To: patch@linaro.org Received: by 10.140.89.233 with SMTP id v96csp319231qgd; Wed, 5 Apr 2017 08:33:02 -0700 (PDT) X-Received: by 10.99.99.1 with SMTP id x1mr31531150pgb.110.1491406382280; Wed, 05 Apr 2017 08:33:02 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g5si20934482pgk.41.2017.04.05.08.33.01; Wed, 05 Apr 2017 08:33:02 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933003AbdDEP2J (ORCPT + 13 others); Wed, 5 Apr 2017 11:28:09 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:33066 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932677AbdDEJHK (ORCPT ); Wed, 5 Apr 2017 05:07:10 -0400 Received: by mail.free-electrons.com (Postfix, from userid 110) id AEE8020820; Wed, 5 Apr 2017 11:07:07 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from qschulz.lan (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id BD2E220432; Wed, 5 Apr 2017 11:07:06 +0200 (CEST) From: Quentin Schulz To: dmitry.torokhov@gmail.com, robh+dt@kernel.org, mark.rutland@arm.com, maxime.ripard@free-electrons.com, wens@csie.org, lee.jones@linaro.org, linux@armlinux.org.uk, jic23@kernel.org, knaack.h@gmx.de, lars@metafoo.de, pmeerw@pmeerw.net Cc: Quentin Schulz , thomas.petazzoni@free-electrons.com, linux-input@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org, linux-sunxi@googlegroups.com, icenowy@aosc.xyz Subject: [PATCH v4 8/8] ARM: sun8i: sina33: add highest OPP of CPUs Date: Wed, 5 Apr 2017 11:06:34 +0200 Message-Id: <20170405090634.4649-9-quentin.schulz@free-electrons.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170405090634.4649-1-quentin.schulz@free-electrons.com> References: <20170405090634.4649-1-quentin.schulz@free-electrons.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The A33 supports 1.1GHz and 1.2GHz frequencies at 1.32V and the Sinlinx SinA33 has its cpu-supply property set in the cpu DT node. Therefore, CPUfreq knows how to handle the regulator in charge of the CPU and can adjust its voltage to match the OPP. Add these two CPU frequencies to the CPU OPP table of the Sinlinx SinA33. Signed-off-by: Quentin Schulz --- added in v3 arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts | 14 ++++++++++++++ 1 file changed, 14 insertions(+) -- 2.9.3 diff --git a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts index e34e092..9b620cc 100644 --- a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts +++ b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts @@ -87,6 +87,20 @@ cpu-supply = <®_dcdc3>; }; +&cpu0_opp_table { + opp@1104000000 { + opp-hz = /bits/ 64 <1104000000>; + opp-microvolt = <1320000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp@1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <1320000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; +}; + &de { status = "okay"; };