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[209.132.180.67]) by mx.google.com with ESMTP id m11si1843908pgt.21.2017.06.16.04.56.12; Fri, 16 Jun 2017 04:56:12 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.b=ZznFWzWw; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753371AbdFPLzz (ORCPT + 25 others); Fri, 16 Jun 2017 07:55:55 -0400 Received: from fllnx210.ext.ti.com ([198.47.19.17]:55710 "EHLO fllnx210.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752993AbdFPLzt (ORCPT ); Fri, 16 Jun 2017 07:55:49 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllnx210.ext.ti.com (8.15.1/8.15.1) with ESMTP id v5GBtC2S000425; Fri, 16 Jun 2017 06:55:12 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1497614112; bh=rXXLF97hS0A8vSXSJtQlSooowsBmb4vU+Ig0JmWhttE=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=ZznFWzWwMQnCUxlhXc80NqxeT0EgyN3W8SdHVMg8TkeOZt6P7TvodgUK9C96M7jnN n18XdcDkKq9i7nPp6fVjaBfXU3RrYb9vEGjNyrmthfH/XJSUcFagbpLa1bTIwelB+u drI4ljjEr2Tnh59kLokypz9/jtahpqSnT3DfQDGE= Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v5GBtC0u016397; Fri, 16 Jun 2017 06:55:12 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.294.0; Fri, 16 Jun 2017 06:55:11 -0500 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id v5GBsd1b016625; Fri, 16 Jun 2017 06:55:09 -0500 From: Kishon Vijay Abraham I To: Tony Lindgren , CC: Rob Herring , , , , , Ulf Hansson , , Russell King , Subject: [PATCH 08/12] ARM: dts: am571x-idk: Add pinmux configuration for MMC Date: Fri, 16 Jun 2017 17:24:35 +0530 Message-ID: <20170616115439.8508-9-kishon@ti.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170616115439.8508-1-kishon@ti.com> References: <20170616115439.8508-1-kishon@ti.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Include dra72x-mmc-iodelay.dtsi which has pinmux and IODelay configuration values for the various MMC modes for dra72 SoC and use it in the pinctrl properties of MMC devicetree nodes present in am571x-idk.dts. Signed-off-by: Kishon Vijay Abraham I --- arch/arm/boot/dts/am571x-idk.dts | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) -- 2.11.0 diff --git a/arch/arm/boot/dts/am571x-idk.dts b/arch/arm/boot/dts/am571x-idk.dts index e685c8e811b0..875291d1bdd7 100644 --- a/arch/arm/boot/dts/am571x-idk.dts +++ b/arch/arm/boot/dts/am571x-idk.dts @@ -11,6 +11,7 @@ #include #include #include "am57xx-idk-common.dtsi" +#include "dra72x-mmc-iodelay.dtsi" / { model = "TI AM5718 IDK"; @@ -72,3 +73,21 @@ id-gpio = <&gpio5 7 GPIO_ACTIVE_HIGH>; vbus-gpio = <&gpio7 22 GPIO_ACTIVE_HIGH>; }; + +&mmc1 { + pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104"; + pinctrl-0 = <&mmc1_pins_default>; + pinctrl-1 = <&mmc1_pins_hs>; + pinctrl-2 = <&mmc1_pins_sdr12>; + pinctrl-3 = <&mmc1_pins_sdr25>; + pinctrl-4 = <&mmc1_pins_sdr50>; + pinctrl-5 = <&mmc1_pins_ddr50_rev20 &mmc1_iodelay_ddr50_conf>; + pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>; +}; + +&mmc2 { + pinctrl-names = "default", "hs", "ddr_1_8v"; + pinctrl-0 = <&mmc2_pins_default>; + pinctrl-1 = <&mmc2_pins_hs>; + pinctrl-2 = <&mmc2_pins_ddr_rev20 &mmc2_iodelay_ddr_conf>; +};