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X-Host: mariner.tdc.vzwcorp.com Received: from ohtwi1exh001.uswin.ad.vzwcorp.com ([10.144.218.43]) by eris.verizonwireless.com with ESMTP/TLS/AES128-SHA256; 25 Oct 2017 01:56:04 +0000 Received: from tbwexch12apd.uswin.ad.vzwcorp.com (153.114.162.36) by OHTWI1EXH001.uswin.ad.vzwcorp.com (10.144.218.43) with Microsoft SMTP Server (TLS) id 14.3.248.2; Tue, 24 Oct 2017 21:56:04 -0400 Received: from OMZP1LUMXCA19.uswin.ad.vzwcorp.com (144.8.22.197) by tbwexch12apd.uswin.ad.vzwcorp.com (153.114.162.36) with Microsoft SMTP Server (TLS) id 15.0.1263.5; Tue, 24 Oct 2017 21:56:04 -0400 Received: from OMZP1LUMXCA17.uswin.ad.vzwcorp.com (144.8.22.195) by OMZP1LUMXCA19.uswin.ad.vzwcorp.com (144.8.22.197) with Microsoft SMTP Server (TLS) id 15.0.1263.5; Tue, 24 Oct 2017 20:56:03 -0500 Received: from OMZP1LUMXCA17.uswin.ad.vzwcorp.com ([144.8.22.195]) by OMZP1LUMXCA17.uswin.ad.vzwcorp.com ([144.8.22.195]) with mapi id 15.00.1263.000; Tue, 24 Oct 2017 20:56:03 -0500 To: "linux-kernel@vger.kernel.org" , "stable@vger.kernel.org" Subject: [PATCH AUTOSEL for 4.9 18/50] arm64: dma-mapping: Only swizzle DMA ops for IOMMU_DOMAIN_DMA Thread-Topic: [PATCH AUTOSEL for 4.9 18/50] arm64: dma-mapping: Only swizzle DMA ops for IOMMU_DOMAIN_DMA Thread-Index: AQHTTTRlAW6RuxOz0kaTMEt7Kht5wA== Date: Wed, 25 Oct 2017 01:55:56 +0000 Message-ID: <20171025015539.24525-18-alexander.levin@verizon.com> References: <20171025015539.24525-1-alexander.levin@verizon.com> In-Reply-To: <20171025015539.24525-1-alexander.levin@verizon.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-messagesentrepresentingtype: 1 x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [10.144.60.250] MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Will Deacon [ Upstream commit 4a8d8a14c0d08c2437cb80c05e88f6cc1ca3fb2c ] The arm64 DMA-mapping implementation sets the DMA ops to the IOMMU DMA ops if we detect that an IOMMU is present for the master and the DMA ranges are valid. In the case when the IOMMU domain for the device is not of type IOMMU_DOMAIN_DMA, then we have no business swizzling the ops, since we're not in control of the underlying address space. This patch leaves the DMA ops alone for masters attached to non-DMA IOMMU domains. Reviewed-by: Robin Murphy Signed-off-by: Will Deacon Signed-off-by: Sasha Levin --- arch/arm64/mm/dma-mapping.c | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) -- 2.11.0 diff --git a/arch/arm64/mm/dma-mapping.c b/arch/arm64/mm/dma-mapping.c index b5bf46ce873b..cab3574ab7d9 100644 --- a/arch/arm64/mm/dma-mapping.c +++ b/arch/arm64/mm/dma-mapping.c @@ -836,14 +836,21 @@ static bool do_iommu_attach(struct device *dev, const struct iommu_ops *ops, * then the IOMMU core will have already configured a group for this * device, and allocated the default domain for that group. */ - if (!domain || iommu_dma_init_domain(domain, dma_base, size, dev)) { - pr_warn("Failed to set up IOMMU for device %s; retaining platform DMA ops\n", - dev_name(dev)); - return false; + if (!domain) + goto out_err; + + if (domain->type == IOMMU_DOMAIN_DMA) { + if (iommu_dma_init_domain(domain, dma_base, size, dev)) + goto out_err; + + dev->archdata.dma_ops = &iommu_dma_ops; } - dev->archdata.dma_ops = &iommu_dma_ops; return true; +out_err: + pr_warn("Failed to set up IOMMU for device %s; retaining platform DMA ops\n", + dev_name(dev)); + return false; } static void queue_iommu_attach(struct device *dev, const struct iommu_ops *ops,