From patchwork Sat Feb 10 02:41:16 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 127891 Delivered-To: patch@linaro.org Received: by 10.46.124.24 with SMTP id x24csp1187583ljc; Fri, 9 Feb 2018 18:42:51 -0800 (PST) X-Google-Smtp-Source: AH8x225QlJfL5d6IHJDm6uqN+KsjASgVFdq2joOYI95wXGM03pZunhtxMAmiVSdCHRKYnIvwnLY/ X-Received: by 2002:a17:902:c81:: with SMTP id 1-v6mr4402324plt.281.1518230571114; Fri, 09 Feb 2018 18:42:51 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1518230571; cv=none; d=google.com; s=arc-20160816; b=O3AuuB97TGg1B99jhzA7KqjGlz8UdzqlV9D1nRY1Ju2UpN9x8WBu/4i5tH0aekvlTg 492N3EQa/QbrWoZ6u7Y2y3ftMnramYsYmWjb9DT3rSo/vJ2mYy8Wr1eOM+L7I0oYOOVo 1LAjIPk1lz9BiBur23JCX5Y09y7xI4oAUi3DActDJrhlyzF33R5mVXR+VqVw9P+O6NGq y6x4D5yOjsjyFizFGLuzWE5+y3LKHoT9gLZCJwXc+beoeovUAA35gqSyKo33kzmN8fkI xPnGO/D0c5GhxXfAqlrYc6NrVcYThHWxq3Rfc5RYzALciF1D1+SLpSX1T+8pw5RK+Hpq 7E9w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=Uy+OnSE0HzTbPuBqcNNil7FWRqCLLGEQ+YyxDvuuSwQ=; b=YyC2IL7SmcRyMDRkKn7iWagtKN1SWjiuAdJnyfQiEwpwnH3lqw2NsgDFcVyPqEW/nQ pP5svfRZKBqk7ZRdmkvztZgUv/v2Ajctoyb3bypPwrGwxvLy3uV6khvOTGR+UkbCaXxu Me6qMMzGkY/z5SYMwmtBdKJKsOrL+DHWWw7kIS8PLQeilQ5hPFmKtjikAuic0dMZaPZH /ivNMWjsJUvuEecd4Zp+/zjsdyvm3zV05QFF/IASKnjSOt+oPs+1cVpjHkO//0Zo1qfB gmEXQ4qZB7dTU7w6o1tAEooPUJ+z9FkdbvOCFYqCXs3BmoZh8dk7jUZi/EFDVYWntflh uaOA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=h/yn8BqL; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o11si648050pgp.624.2018.02.09.18.42.50; Fri, 09 Feb 2018 18:42:51 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=h/yn8BqL; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752413AbeBJCmu (ORCPT + 18 others); Fri, 9 Feb 2018 21:42:50 -0500 Received: from mail-pg0-f67.google.com ([74.125.83.67]:37398 "EHLO mail-pg0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752373AbeBJCmr (ORCPT ); Fri, 9 Feb 2018 21:42:47 -0500 Received: by mail-pg0-f67.google.com with SMTP id o1so4858856pgn.4 for ; Fri, 09 Feb 2018 18:42:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Uy+OnSE0HzTbPuBqcNNil7FWRqCLLGEQ+YyxDvuuSwQ=; b=h/yn8BqLsZaXCDJxVPrPauHhZ8PHKZoe7yW0nDxD6Z49jnV8FkEA+YgClXMwyuvVAa s9GdRrs5uHLnCqEd1YO7/vP2ilOr82IY3tTYW+WybSXmgHnxcvyjFUa6paRiLru2+NnX G1aM/gGecM9vgVhmGHlFI2jFQhXgs2UL7fPjI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Uy+OnSE0HzTbPuBqcNNil7FWRqCLLGEQ+YyxDvuuSwQ=; b=ka9Nd7Ke4ftG5sFE0JjgM1VK50mwgu6GizCugcrUCpuzxu2sAAQCQ/sqP7LuMz8Fi2 R8RvU6PN+s+0aNjH1772YDVRv+Y2lYO/a+3U8gdvdJdnTVHu9IgmbTL2rzwo+fMcJ1tl 5Vlaf74KiLIDB3qSYgCvsQA8tkr7Erdw+7rCRWOQwb9+CtVnoAK5J0DQVIABTNRMpdKj yyao6VNxxqjXUC0KpuznzrpHUwHfTKzzkrpjCjVGSztDhasvWlOKsw+4raLJSZJa1DUg +8REOZbXf0VXILoVEP1SK7LCyxo/tQXjlyf98C8hrZUnVipgSz6YEv/cbdJViHQZFz4Q tkUw== X-Gm-Message-State: APf1xPBaQ8Dtrb94W/+sprr4twBcj3qCVjQs6KtnRXht38fzf0neo6s0 d3f9AMWGfV6eO+VjNSFczuTB X-Received: by 10.98.73.157 with SMTP id r29mr4877433pfi.218.1518230566298; Fri, 09 Feb 2018 18:42:46 -0800 (PST) Received: from localhost.localdomain ([2405:204:7185:1f8f:fdb9:648e:14d3:8b97]) by smtp.gmail.com with ESMTPSA id z6sm7883286pgu.49.2018.02.09.18.42.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 09 Feb 2018 18:42:45 -0800 (PST) From: Manivannan Sadhasivam To: mturquette@baylibre.com, sboyd@codeaurora.org, afaerber@suse.de, robh+dt@kernel.org, mark.rutland@arm.com Cc: liuwei@actions-semi.com, mp-cs@actions-semi.com, 96boards@ucrobotics.com, devicetree@vger.kernel.org, davem@davemloft.net, mchehab@kernel.org, daniel.thompson@linaro.org, amit.kucheria@linaro.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, viresh.kumar@linaro.org, Manivannan Sadhasivam Subject: [PATCH v3 07/11] clk: actions: Add divider clock support Date: Sat, 10 Feb 2018 08:11:16 +0530 Message-Id: <20180210024120.27503-8-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180210024120.27503-1-manivannan.sadhasivam@linaro.org> References: <20180210024120.27503-1-manivannan.sadhasivam@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support for Actions Semi divider clock together with helper functions to be used in composite clock. Signed-off-by: Manivannan Sadhasivam --- drivers/clk/actions/Makefile | 1 + drivers/clk/actions/owl-divider.c | 94 +++++++++++++++++++++++++++++++++++++++ drivers/clk/actions/owl-divider.h | 75 +++++++++++++++++++++++++++++++ 3 files changed, 170 insertions(+) create mode 100644 drivers/clk/actions/owl-divider.c create mode 100644 drivers/clk/actions/owl-divider.h -- 2.14.1 diff --git a/drivers/clk/actions/Makefile b/drivers/clk/actions/Makefile index 2d4aa8f35d90..5ce75df57e1a 100644 --- a/drivers/clk/actions/Makefile +++ b/drivers/clk/actions/Makefile @@ -3,3 +3,4 @@ obj-$(CONFIG_CLK_ACTIONS) += clk-owl.o clk-owl-y += owl-common.o clk-owl-y += owl-gate.o clk-owl-y += owl-mux.o +clk-owl-y += owl-divider.o diff --git a/drivers/clk/actions/owl-divider.c b/drivers/clk/actions/owl-divider.c new file mode 100644 index 000000000000..cddac00fe324 --- /dev/null +++ b/drivers/clk/actions/owl-divider.c @@ -0,0 +1,94 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// OWL divider clock driver +// +// Copyright (c) 2014 Actions Semi Inc. +// Author: David Liu +// +// Copyright (c) 2018 Linaro Ltd. +// Author: Manivannan Sadhasivam + +#include +#include + +#include "owl-divider.h" + +long owl_divider_helper_round_rate(struct owl_clk_common *common, + const struct owl_divider_hw *div_hw, + unsigned long rate, + unsigned long *parent_rate) +{ + return divider_round_rate(&common->hw, rate, parent_rate, + div_hw->table, div_hw->width, + div_hw->div_flags); +} + +static long owl_divider_round_rate(struct clk_hw *hw, unsigned long rate, + unsigned long *parent_rate) +{ + struct owl_divider *div = hw_to_owl_divider(hw); + + return owl_divider_helper_round_rate(&div->common, &div->div_hw, + rate, parent_rate); +} + +unsigned long owl_divider_helper_recalc_rate(struct owl_clk_common *common, + const struct owl_divider_hw *div_hw, + unsigned long parent_rate) +{ + unsigned long val; + unsigned int reg; + + regmap_read(common->regmap, div_hw->reg, ®); + val = reg >> div_hw->shift; + val &= (1 << div_hw->width) - 1; + + return divider_recalc_rate(&common->hw, parent_rate, + val, div_hw->table, + div_hw->div_flags, + div_hw->width); +} + +static unsigned long owl_divider_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + struct owl_divider *div = hw_to_owl_divider(hw); + + return owl_divider_helper_recalc_rate(&div->common, + &div->div_hw, parent_rate); +} + +int owl_divider_helper_set_rate(const struct owl_clk_common *common, + const struct owl_divider_hw *div_hw, + unsigned long rate, + unsigned long parent_rate) +{ + unsigned long val; + unsigned int reg; + + val = divider_get_val(rate, parent_rate, div_hw->table, + div_hw->width, 0); + + regmap_read(common->regmap, div_hw->reg, ®); + reg &= ~GENMASK(div_hw->width + div_hw->shift - 1, div_hw->shift); + + regmap_write(common->regmap, div_hw->reg, + reg | (val << div_hw->shift)); + + return 0; +} + +static int owl_divider_set_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) +{ + struct owl_divider *div = hw_to_owl_divider(hw); + + return owl_divider_helper_set_rate(&div->common, &div->div_hw, + rate, parent_rate); +} + +const struct clk_ops owl_divider_ops = { + .recalc_rate = owl_divider_recalc_rate, + .round_rate = owl_divider_round_rate, + .set_rate = owl_divider_set_rate, +}; diff --git a/drivers/clk/actions/owl-divider.h b/drivers/clk/actions/owl-divider.h new file mode 100644 index 000000000000..92d3e3d23967 --- /dev/null +++ b/drivers/clk/actions/owl-divider.h @@ -0,0 +1,75 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// OWL divider clock driver +// +// Copyright (c) 2014 Actions Semi Inc. +// Author: David Liu +// +// Copyright (c) 2018 Linaro Ltd. +// Author: Manivannan Sadhasivam + +#ifndef _OWL_DIVIDER_H_ +#define _OWL_DIVIDER_H_ + +#include "owl-common.h" + +struct owl_divider_hw { + u32 reg; + u8 shift; + u8 width; + u8 div_flags; + struct clk_div_table *table; +}; + +struct owl_divider { + struct owl_divider_hw div_hw; + struct owl_clk_common common; +}; + +#define OWL_DIVIDER_HW(_reg, _shift, _width, _div_flags, _table) \ + { \ + .reg = _reg, \ + .shift = _shift, \ + .width = _width, \ + .div_flags = _div_flags, \ + .table = _table, \ + } + +#define OWL_DIVIDER(_struct, _name, _parent, _reg, \ + _shift, _width, _table, _div_flags, _flags) \ + struct owl_divider _struct = { \ + .div_hw = OWL_DIVIDER_HW(_reg, _shift, _width, \ + _div_flags, _table), \ + .common = { \ + .regmap = NULL, \ + .hw.init = CLK_HW_INIT(_name, \ + _parent, \ + &owl_divider_ops, \ + _flags), \ + }, \ + } + +static inline struct owl_divider *hw_to_owl_divider(const struct clk_hw *hw) +{ + struct owl_clk_common *common = hw_to_owl_clk_common(hw); + + return container_of(common, struct owl_divider, common); +} + +long owl_divider_helper_round_rate(struct owl_clk_common *common, + const struct owl_divider_hw *div_hw, + unsigned long rate, + unsigned long *parent_rate); + +unsigned long owl_divider_helper_recalc_rate(struct owl_clk_common *common, + const struct owl_divider_hw *div_hw, + unsigned long parent_rate); + +int owl_divider_helper_set_rate(const struct owl_clk_common *common, + const struct owl_divider_hw *div_hw, + unsigned long rate, + unsigned long parent_rate); + +extern const struct clk_ops owl_divider_ops; + +#endif /* _OWL_DIVIDER_H_ */