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[209.132.180.67]) by mx.google.com with ESMTP id p10si15502400pfn.65.2018.05.03.23.03.18; Thu, 03 May 2018 23:03:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=boHwZHH1; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751629AbeEDGBV (ORCPT + 29 others); Fri, 4 May 2018 02:01:21 -0400 Received: from mail-wm0-f65.google.com ([74.125.82.65]:34616 "EHLO mail-wm0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751404AbeEDGBS (ORCPT ); Fri, 4 May 2018 02:01:18 -0400 Received: by mail-wm0-f65.google.com with SMTP id a137-v6so5575853wme.1 for ; Thu, 03 May 2018 23:01:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=8RPmP673iKgidaREzK9EYXMfvDILehSjkoL4rWwjiHM=; b=boHwZHH1lHYYF+mNV8ZWIh+vqgJrmIWO37XwPFmIxfJI5BclBE83bppEEHDXd0/AhU sax9zbYFR2VWxYS6fvRqNfLQO4rJPNVFZvc6ZDoUSWGUI3+MvlsPtEes6KKixYAGqMKB vGDVgPteapmie7YYcbPqyoa12QC+LT8z++0oQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=8RPmP673iKgidaREzK9EYXMfvDILehSjkoL4rWwjiHM=; b=hJ3zF9CFuvw64zZ/cm8BOIcUYtq5LKCc/lWHGLy72dqORiQGJcWcfMM7vXsbVbuBfA B1/iw0Om4mf31t8wceCcuM3LgxZ1l08eaW4Wf9EP+uwYopGgI6/kXOpFFaYTSdnIDu96 T0u8KvP5mOqwIftXrWG6j5gfsQaHefc5Gb/K2OUdTEj8/bJ2gOeCv4xatohnbrEGP84S YObXJNz50fbEKBkOse5jL7eAMPkBkea87iMNULiFkAms0ItXen7luJ8FVexpgc2hJGdb /lamz8sltCpORIi6K1gT1MIQNoRt/MpPBTUbDdZfIyrtMMbuuRIBqUACTuI1QX+f94mC 95dQ== X-Gm-Message-State: ALQs6tCk36QAjwyJ2LiC1POeGMexlkDhZ9EdEqmduTTT6wnAPTLrVZM5 6c+jDdsydivi/M5tU7mlKUzOJQ== X-Received: by 10.28.111.82 with SMTP id k79mr14665505wmc.38.1525413676913; Thu, 03 May 2018 23:01:16 -0700 (PDT) Received: from localhost.localdomain ([2a01:e35:3995:5470:200:1aff:fe1b:b328]) by smtp.gmail.com with ESMTPSA id i30-v6sm32411863wra.38.2018.05.03.23.01.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 03 May 2018 23:01:16 -0700 (PDT) From: Ard Biesheuvel To: linux-efi@vger.kernel.org, Ingo Molnar , Thomas Gleixner Cc: Yazen Ghannam , Ard Biesheuvel , linux-kernel@vger.kernel.org Subject: [PATCH 08/17] efi: Decode additional IA32/X64 Bus Check fields Date: Fri, 4 May 2018 07:59:54 +0200 Message-Id: <20180504060003.19618-9-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180504060003.19618-1-ard.biesheuvel@linaro.org> References: <20180504060003.19618-1-ard.biesheuvel@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Yazen Ghannam The "Participation Type", "Time Out", and "Address Space" fields are unique to the IA32/X64 Bus Check structure. Print these fields. Based on UEFI 2.7 Table 256. IA32/X64 Bus Check Structure Signed-off-by: Yazen Ghannam Signed-off-by: Ard Biesheuvel --- drivers/firmware/efi/cper-x86.c | 44 +++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) -- 2.17.0 diff --git a/drivers/firmware/efi/cper-x86.c b/drivers/firmware/efi/cper-x86.c index f70c46f7a4db..5e6716564dba 100644 --- a/drivers/firmware/efi/cper-x86.c +++ b/drivers/firmware/efi/cper-x86.c @@ -39,6 +39,10 @@ #define CHECK_VALID_RESTARTABLE_IP BIT_ULL(6) #define CHECK_VALID_OVERFLOW BIT_ULL(7) +#define CHECK_VALID_BUS_PART_TYPE BIT_ULL(8) +#define CHECK_VALID_BUS_TIME_OUT BIT_ULL(9) +#define CHECK_VALID_BUS_ADDR_SPACE BIT_ULL(10) + #define CHECK_VALID_BITS(check) (((check) & GENMASK_ULL(15, 0))) #define CHECK_TRANS_TYPE(check) (((check) & GENMASK_ULL(17, 16)) >> 16) #define CHECK_OPERATION(check) (((check) & GENMASK_ULL(21, 18)) >> 18) @@ -49,6 +53,10 @@ #define CHECK_RESTARTABLE_IP BIT_ULL(28) #define CHECK_OVERFLOW BIT_ULL(29) +#define CHECK_BUS_PART_TYPE(check) (((check) & GENMASK_ULL(31, 30)) >> 30) +#define CHECK_BUS_TIME_OUT BIT_ULL(32) +#define CHECK_BUS_ADDR_SPACE(check) (((check) & GENMASK_ULL(34, 33)) >> 33) + enum err_types { ERR_TYPE_CACHE = 0, ERR_TYPE_TLB, @@ -89,6 +97,20 @@ static const char * const ia_check_op_strs[] = { "snoop", }; +static const char * const ia_check_bus_part_type_strs[] = { + "Local Processor originated request", + "Local Processor responded to request", + "Local Processor observed", + "Generic", +}; + +static const char * const ia_check_bus_addr_space_strs[] = { + "Memory Access", + "Reserved", + "I/O", + "Other Transaction", +}; + static inline void print_bool(char *str, const char *pfx, u64 check, u64 bit) { printk("%s%s: %s\n", pfx, str, (check & bit) ? "true" : "false"); @@ -139,6 +161,28 @@ static void print_err_info(const char *pfx, u8 err_type, u64 check) if (validation_bits & CHECK_VALID_OVERFLOW) print_bool("Overflow", pfx, check, CHECK_OVERFLOW); + + if (err_type != ERR_TYPE_BUS) + return; + + if (validation_bits & CHECK_VALID_BUS_PART_TYPE) { + u8 part_type = CHECK_BUS_PART_TYPE(check); + + printk("%sParticipation Type: %u, %s\n", pfx, part_type, + part_type < ARRAY_SIZE(ia_check_bus_part_type_strs) ? + ia_check_bus_part_type_strs[part_type] : "unknown"); + } + + if (validation_bits & CHECK_VALID_BUS_TIME_OUT) + print_bool("Time Out", pfx, check, CHECK_BUS_TIME_OUT); + + if (validation_bits & CHECK_VALID_BUS_ADDR_SPACE) { + u8 addr_space = CHECK_BUS_ADDR_SPACE(check); + + printk("%sAddress Space: %u, %s\n", pfx, addr_space, + addr_space < ARRAY_SIZE(ia_check_bus_addr_space_strs) ? + ia_check_bus_addr_space_strs[addr_space] : "unknown"); + } } void cper_print_proc_ia(const char *pfx, const struct cper_sec_proc_ia *proc)