From patchwork Wed May 23 13:35:29 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Rutland X-Patchwork-Id: 136657 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp907555lji; Wed, 23 May 2018 06:36:37 -0700 (PDT) X-Google-Smtp-Source: AB8JxZqnew6BL2R0XRQA0QstrQd9rhpw12UnlIbwyX/E5Dhe6L1U3Us0ANhINPHjsmrtzBmwPTRd X-Received: by 2002:a63:6105:: with SMTP id v5-v6mr2340426pgb.299.1527082597260; Wed, 23 May 2018 06:36:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527082597; cv=none; d=google.com; s=arc-20160816; b=t7Le40B0NBPSA/y3xucvifRWJfVjpwDGome/Tvxe2eP3B6rGGQhwNmon+ZZBggAnrK 0eiH+PcxT4W8hf7GJXUIwBu1fRQZQE0cL3Ug4adJsDIv3bG+pIw1GfFav7pRxLDMwk5z QnHWXOtxefABgAaSMtze4s/F1QYqOKkUg1znh4em4gEnJf4Q/FFllU5D+waQ0zYL3sp4 18YTqDOkD4AHfxg21ATmDJ+utqfUUulnz+JR92FrsRXhl9vkdvXtp3zt7yYBbW9Gn3Ea MrXM+CSOrbOvEqgr3TEDN39OEXOCSgU860TdQQhi7xAHDmIZjGbOwMi+hNJ8r2cc31UD FT8w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=WAcH0XE9BCX2kHgzUTpc5nGLHlRH5/bs7FSOzv7o8G0=; b=f9VpGSCSbmWmtulKTjvTXhuGNqVL6Kjj/FqzjGmU9kWN2p3v+3OnJn/CbriPzSIXvg 4tRV0AtqspYblZwNN0VRXELnCCpWCszNMKx8eh8Drt90tJqRT+Te9HZxdLpWA+ldMa7/ eP0WnZRIEnjRbq/g7sNbXESkwhvX7j+8t0rTnKGOXtBvudZM8d2O2GJ37EDRjEX5SQAC 1k+3xaz01gdb3H4nfUmCaIkyebuv6R9kMSN3x/daqmyh+frgMoSQKhjPPZYtYkhhqOm5 YoAM4mRSECZ2uErfGRXCgP3WlHo8zZde18qNn/UU3kngFeZLRJ+CxzFmecAIFg/NaRlE wh/A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z64-v6si14897235pgb.471.2018.05.23.06.36.36; Wed, 23 May 2018 06:36:37 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933185AbeEWNge (ORCPT + 30 others); Wed, 23 May 2018 09:36:34 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:55410 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933050AbeEWNgY (ORCPT ); Wed, 23 May 2018 09:36:24 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 86E6B1435; Wed, 23 May 2018 06:36:24 -0700 (PDT) Received: from lakrids.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 560283F24A; Wed, 23 May 2018 06:36:23 -0700 (PDT) From: Mark Rutland To: linux-kernel@vger.kernel.org Cc: Mark Rutland , Boqun Feng , Peter Zijlstra , Will Deacon , Russell King Subject: [PATCH 09/13] atomics/arm: define atomic64_fetch_add_unless() Date: Wed, 23 May 2018 14:35:29 +0100 Message-Id: <20180523133533.1076-10-mark.rutland@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180523133533.1076-1-mark.rutland@arm.com> References: <20180523133533.1076-1-mark.rutland@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org As a step towards unifying the atomic/atomic64/atomic_long APIs, this patch converts the arch/arm implementation of atomic64_add_unless() into an implementation of atomic64_fetch_add_unless(). A wrapper in will build atomic_add_unless() atop of this, provided it is given a preprocessor definition. No functional change is intended as a result of this patch. Signed-off-by: Mark Rutland Cc: Boqun Feng Cc: Peter Zijlstra Cc: Will Deacon Cc: Russell King --- arch/arm/include/asm/atomic.h | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) -- 2.11.0 diff --git a/arch/arm/include/asm/atomic.h b/arch/arm/include/asm/atomic.h index 74460aa00fa0..852e1fee72b0 100644 --- a/arch/arm/include/asm/atomic.h +++ b/arch/arm/include/asm/atomic.h @@ -486,11 +486,11 @@ static inline long long atomic64_dec_if_positive(atomic64_t *v) return result; } -static inline int atomic64_add_unless(atomic64_t *v, long long a, long long u) +static inline long long atomic64_fetch_add_unless(atomic64_t *v, long long a, + long long u) { - long long val; + long long oldval, newval; unsigned long tmp; - int ret = 1; smp_mb(); prefetchw(&v->counter); @@ -499,23 +499,23 @@ static inline int atomic64_add_unless(atomic64_t *v, long long a, long long u) "1: ldrexd %0, %H0, [%4]\n" " teq %0, %5\n" " teqeq %H0, %H5\n" -" moveq %1, #0\n" " beq 2f\n" -" adds %Q0, %Q0, %Q6\n" -" adc %R0, %R0, %R6\n" -" strexd %2, %0, %H0, [%4]\n" +" adds %Q1, %Q0, %Q6\n" +" adc %R1, %R0, %R6\n" +" strexd %2, %1, %H1, [%4]\n" " teq %2, #0\n" " bne 1b\n" "2:" - : "=&r" (val), "+r" (ret), "=&r" (tmp), "+Qo" (v->counter) + : "=&r" (oldval), "=&r" (newval), "=&r" (tmp), "+Qo" (v->counter) : "r" (&v->counter), "r" (u), "r" (a) : "cc"); - if (ret) + if (oldval != u) smp_mb(); - return ret; + return oldval; } +#define atomic64_fetch_add_unless atomic64_fetch_add_unless #define atomic64_add_negative(a, v) (atomic64_add_return((a), (v)) < 0) #define atomic64_inc(v) atomic64_add(1LL, (v))