From patchwork Sun Jul 22 21:19:59 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 142510 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp5356775ljj; Sun, 22 Jul 2018 14:20:33 -0700 (PDT) X-Google-Smtp-Source: AAOMgpfwsPJLKlbWLblhkfSe8iErsUu4ZGpC2He6WfDqhEqBlufDj7ri553J++G+ISBWu3uWYArR X-Received: by 2002:a63:7d48:: with SMTP id m8-v6mr9920762pgn.0.1532294433133; Sun, 22 Jul 2018 14:20:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532294433; cv=none; d=google.com; s=arc-20160816; b=IXuj8B1/d2ti0LKN48OZsYWys0v+vi+I+uczEhQUHXdGf241UX0BSUkHD6PY1InZMn nU7yvoqtvsz9IbJ+hqasQYvBPdfKEc6Z0WGPdwzQ7FxiI3xNkZXIIdP5V4XnT1Op35gK +PyQOSc7YQdeTAQg4kaVUG8GtpvHOq+dCLumsLAVVijDeVeOdkaYBNpDzBfUdX/pqQze kQHs/MHXZWYxjL4uFjofzJ9hhUT5IhAnXClHAE9eKJ+1m8EffqFctF5O6TbmwXDZnfLF wjxsWJkGKnW0w4axqCNY+GrrD3CltC2BKNVzhmsvTdnSkfEcPCJ2WlREqNr6EEaSBaRW gWng== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=ksLS4G7dC8F2SbIpbfnK2JYt1RP+rbwgpL3PwvIkUVs=; b=ZRTTpBAQsVTgeghYZKJpIu0L5vkv0xtBFuyP9tz7m6kMIHqv03j0GirxJnZ1n0eKgW t4YflEoc0Qv1/Tx06qFXsl1IalGMW8y3ImnZ/rACidrib4+AfPuZ1Pya0mcwUyFrV4ZF HMR08juDUWzEF3ED2uLvKUmUwMTHF4uikuRquewNnnNMnWQ0UXgHVDryPSQSrOoQyzOQ UJk6Q3UwAR5HG9XAW1tWFtWsc/Dx5HzsnYA98khdifcqhP6ePjifl9LRemU8OliljAkk mED4rPDtUxrsXuLIrfiUSHEcDcjWtxnONmYaqPdQ7oSuJ77i/sP82Eh9LEljAFVlXaTt 3/wQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k23-v6si7074765pgl.633.2018.07.22.14.20.32; Sun, 22 Jul 2018 14:20:33 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387725AbeGVWSW (ORCPT + 31 others); Sun, 22 Jul 2018 18:18:22 -0400 Received: from mx2.suse.de ([195.135.220.15]:38748 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1730377AbeGVWSW (ORCPT ); Sun, 22 Jul 2018 18:18:22 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id CE17AAFC9; Sun, 22 Jul 2018 21:20:19 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-mips@linux-mips.org Cc: Ralf Baechle , Paul Burton , James Hogan , linux-kernel@vger.kernel.org, Ian Pozella , =?utf-8?q?Andreas_F=C3=A4rber?= , James Hartley , Rahul Bedarkar , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH 04/15] MIPS: dts: img: pistachio_marduk: Switch mmc to 1 bit mode Date: Sun, 22 Jul 2018 23:19:59 +0200 Message-Id: <20180722212010.3979-5-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20180722212010.3979-1-afaerber@suse.de> References: <20180722212010.3979-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ian Pozella The mmc block in Pistachio allows 1 to 8 data bits to be used. Marduk uses 4 bits allowing the upper 4 bits to be allocated to the Mikrobus ports. However these bits are still connected internally meaning the mmc block recieves signals on all data lines and seems the internal HW CRC checks get corrupted by this erroneous data. We cannot control what data is sent on these lines because they go to external ports. 1 bit mode does not exhibit the issue hence the safe default is to use this. If a user knows that in their use case they will not use the upper bits then they can set to 4 bit mode in order to improve performance. Also make sure that the upper 4 bits don't get allocated to the mmc driver (the default is to assign all 8 pins) so they can be allocated to other drivers. Allocating all 4 despite setting 1 bit mode as this matches what is there in hardware. Signed-off-by: Ian Pozella Signed-off-by: Andreas Färber --- arch/mips/boot/dts/img/pistachio_marduk.dts | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) -- 2.16.4 diff --git a/arch/mips/boot/dts/img/pistachio_marduk.dts b/arch/mips/boot/dts/img/pistachio_marduk.dts index 29358d1f7027..5557a6ad61c3 100644 --- a/arch/mips/boot/dts/img/pistachio_marduk.dts +++ b/arch/mips/boot/dts/img/pistachio_marduk.dts @@ -120,6 +120,7 @@ &pin_sdhost_data { drive-strength = <2>; + pins = "mfio17", "mfio18", "mfio19", "mfio20"; }; &pwm { @@ -132,7 +133,7 @@ &sdhost { status = "okay"; - bus-width = <4>; + bus-width = <1>; disable-wp; };