From patchwork Thu Nov 8 09:31:23 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 150488 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp605040ljp; Thu, 8 Nov 2018 01:31:46 -0800 (PST) X-Google-Smtp-Source: AJdET5eH2tReTVwD1I2D+ngw/T+WOv9AkF/UOfQwJQQEU1MUmvw2TiO/qgzahzorD1PV1spxeXIH X-Received: by 2002:a63:2586:: with SMTP id l128mr3267156pgl.104.1541669506587; Thu, 08 Nov 2018 01:31:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1541669506; cv=none; d=google.com; s=arc-20160816; b=MDZNyjkyvg6hbcD8Ko4+7wGtbIrNJUaYlwnuoBhAlzK5wHkEMw0k1uDPES39KIpDhq 5cNux3RUMhOD6fMq5fxjT1tmzVA1GBMBksMbviD3yyFN+FOoio1bAFl60sY/MKCrPY2v KBM1soC2D8EiD0fNeglK0XoGQHqK/sZgxrbiJLKKltOZIr6BGmw4eF4UjKdNG4QRLyBO S7JLdcWdpc3wPyZLMNk7LdSi6jvwtMyLZ5qJknGoT/XvHZ3QeJ2PvHoXF9fyt+s6sbkO fbmujaP2XBTkgrcv4OSb+8yOugnrFQPVVuUd0n4QorRAhBBOfEkQCeSokQktTT/NM34N //JQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=Qv6jxXezPla1EOeS4ig4mwMVMLxc3iGmB0uzoW/DK/k=; b=YZTLAGCTH45k3DxIT567ogU5dSl/v9qChcG7Nk4T8G1I7314zIdloBukJAkFbwVAcl JCw21FkLXqlXJYYPJDIbg3sf2pYvNUSJt7HhGA5weisx1fJ8PaJM836CCc9M+/e+TX+j SL/2KEQPO7OdV1/cH8+ZMqBDgKey4+Wu07BrmAmrIndbih+k5X02meZNeUYfyLljjZ7C F7QAeHvHUzyhzhmpNifCJnAFXh9q1dCJ6uK1iT+oMtVrv+s8BPbEi5oNtUfiNrHnrqsm fvZ4OgUttlMlpkKzC3AwOlYGhJ22zWNbPePZm8Uvrnhz5AbJHqoPdsetb+uisD3orLj2 uMjQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b="mdx9CXO/"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u22si2975016pgk.335.2018.11.08.01.31.46; Thu, 08 Nov 2018 01:31:46 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b="mdx9CXO/"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726856AbeKHTGU (ORCPT + 32 others); Thu, 8 Nov 2018 14:06:20 -0500 Received: from mail-wr1-f65.google.com ([209.85.221.65]:45833 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726145AbeKHTGT (ORCPT ); Thu, 8 Nov 2018 14:06:19 -0500 Received: by mail-wr1-f65.google.com with SMTP id k15-v6so17454096wre.12 for ; Thu, 08 Nov 2018 01:31:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=Qv6jxXezPla1EOeS4ig4mwMVMLxc3iGmB0uzoW/DK/k=; b=mdx9CXO/TpiD1KipUPoOtMrz+kColKlRYsgBm6O2nYPqh+8inJomDe1VgG56hL+b+w cQQIlape8z3+vPDINOk2ku8vVusWepOufK/W5GY4eXXNqjc2ISAlcIlCNdmqFJphpfF8 0HQiSFognQ0FeqlMh0a5t46/xEcQIjfRRaBwwXGgQHBmmLv9GJDpUhk/5fJvQYoISA0+ YVgDsHrQS7czjQqVIjyBOz7Z8ujqbe4d3D06QeZ/wOygSuypvv4a6GIVrvwdtDGp8YTO KJKr73wpx6Nbq8X3DVzDN866vlARFoHZa/I/USuDi2OvvKPsEOz723E0DIM+31rvbTPm LOdA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=Qv6jxXezPla1EOeS4ig4mwMVMLxc3iGmB0uzoW/DK/k=; b=lVql7NwiPpPyyGMX5xnZ+Wg/jHo/Q07t7VytSynp7GinQ7/E7EA56+Yo57mnaLyw+p x51ub2T0kz/PQ57+y9uPiRRmGwuxfKtKvj1x8fXJo1VMJ6Qw3ipxQj9Sn3SvKIq2h8zL /hD3DxkQt5ZYLpok/rKsNzs2fbu6wlKbhdQNwdJ0IsoIOTI/VgtUTbsaqzwjZwUvpkrS 4e24XUMpdnqTkW+aM/a6EPXM+pFMUUogg/E3RBi4gKxP0qdIixwUa2VAt12N5kyXiEkk bTuxC2a5epq7XAB5oo1uU/m+6EkGAbpqV/Vcp+d/5xASwq/AYrm3WuXkMvAYc4QzfeQd WOng== X-Gm-Message-State: AGRZ1gIB6aR77hiMH+B+0jZ1Cc8JSUyGL5S7aZdqv9R/BJcT7NflyI1N 2lq7Z2vqFOUw8YigR9DnTheYbw== X-Received: by 2002:a5d:6405:: with SMTP id z5-v6mr3206051wru.64.1541669501171; Thu, 08 Nov 2018 01:31:41 -0800 (PST) Received: from boomer.local ([90.63.244.31]) by smtp.googlemail.com with ESMTPSA id m9-v6sm3513691wrn.36.2018.11.08.01.31.40 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 08 Nov 2018 01:31:40 -0800 (PST) From: Jerome Brunet To: Stephen Boyd , Neil Armstrong , Carlo Caione , Kevin Hilman Cc: Jerome Brunet , Michael Turquette , linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] clk: meson: axg: mark fdiv2 and fdiv3 as critical Date: Thu, 8 Nov 2018 10:31:23 +0100 Message-Id: <20181108093123.21498-1-jbrunet@baylibre.com> X-Mailer: git-send-email 2.19.1 MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Similar to gxbb and gxl platforms, axg SCPI Cortex-M co-processor uses the fdiv2 and fdiv3 to, among other things, provide the cpu clock. Until clock hand-off mechanism makes its way to CCF and the generic SCPI claims platform specific clocks, these clocks must be marked as critical to make sure they are never disabled when needed by the co-processor. Fixes: 05f814402d61 ("clk: meson: add fdiv clock gates") Signed-off-by: Jerome Brunet --- Hi Stephen, If you can put this one in clk-fixes as well, it would be awesome. It is basically the same thing as the change you took this Tuesday. Since then, we had reports the same problem with SCPI was happening on the axg, calling for the same fixup. Cheers Jerome drivers/clk/meson/axg.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) -- 2.19.1 Acked-by: Neil Armstrong diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c index c981159b02c0..792735d7e46e 100644 --- a/drivers/clk/meson/axg.c +++ b/drivers/clk/meson/axg.c @@ -325,6 +325,7 @@ static struct clk_regmap axg_fclk_div2 = { .ops = &clk_regmap_gate_ops, .parent_names = (const char *[]){ "fclk_div2_div" }, .num_parents = 1, + .flags = CLK_IS_CRITICAL, }, }; @@ -349,6 +350,18 @@ static struct clk_regmap axg_fclk_div3 = { .ops = &clk_regmap_gate_ops, .parent_names = (const char *[]){ "fclk_div3_div" }, .num_parents = 1, + /* + * FIXME: + * This clock, as fdiv2, is used by the SCPI FW and is required + * by the platform to operate correctly. + * Until the following condition are met, we need this clock to + * be marked as critical: + * a) The SCPI generic driver claims and enable all the clocks + * it needs + * b) CCF has a clock hand-off mechanism to make the sure the + * clock stays on until the proper driver comes along + */ + .flags = CLK_IS_CRITICAL, }, };