From patchwork Fri Jan 25 18:07:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 156627 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp652942jaa; Fri, 25 Jan 2019 10:08:02 -0800 (PST) X-Google-Smtp-Source: ALg8bN7bjjzjuTKEgCEjUK2G5SAjo/uGFH6uuUcDdeqaalN9MIydxJoFyd4JxrKNfniGSoqSHFbt X-Received: by 2002:a17:902:7044:: with SMTP id h4mr11876356plt.35.1548439682557; Fri, 25 Jan 2019 10:08:02 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1548439682; cv=none; d=google.com; s=arc-20160816; b=Q4oa6IwuNrzh93Xi/Z3U7p4yTRP9EbSapJ2wPeiEIYiAcmktHEFqUoqs5nszE75ivS nND2VSCdJAPzxD/wQ4sILoacSLYHoQRwGhVGGdk6N9tjA0NBTEt+nHZ1dzvPg42icTh2 mHkggbbBqvhFA62lHOd6RE+HL9+w5u31NwtDYSpPps3Ezyq7lzoJqiWvfb3F4YhWr8dj UXnWlh5Py4yNkp1y/5DLRShcGKNUSWo+nVzp9mz3xk1fKv1Otp90Yt6Bx5kBAt+Id3o7 1z6Ghh0DMqvxApv0GtltB4p1+ifZZCjSUNoDgglnqi29037K7tc4V8yOrqZgiSiA1KRx W/Cw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=isEWo00ekroD+hHx+cCcZtCCnan/N/Bz67pHPEmyP9s=; b=Szsj9N0qsjRLkB4Vh/MFegkaBrP6ncVX2TAtQoGy8qLkmyKCerCpCfO5uyC7LeCOlb 0wlAZ1dL/xWHE5cm4S9SNtRg6o+3AjntBNgUqbxNjS2tnevTRmmI+ErXNciVv3QAnADP mD+kYQ4a23YrH/f1scgGUFbeejtDUq/u7izGVgjlzd1jLmd0t2VDNkbYQplETpEyeAdK LBLon2OaA5JiIA9+oqJY3YFFC8uMFyZlo+opMi1DCT9mkbix75KYmu3uZkdypCj4vqYs OtES4hWZouST/IkF6DvuB9ZQylytQFzqohdrVrCCzJJIGQsePnNsbUzgk0ns1JQQHIYm 4nCA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id r27si25639723pgl.494.2019.01.25.10.08.01; Fri, 25 Jan 2019 10:08:02 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729476AbfAYSHx (ORCPT + 31 others); Fri, 25 Jan 2019 13:07:53 -0500 Received: from foss.arm.com ([217.140.101.70]:51868 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729373AbfAYSHb (ORCPT ); Fri, 25 Jan 2019 13:07:31 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5B2D1165C; Fri, 25 Jan 2019 10:07:31 -0800 (PST) Received: from beelzebub.austin.arm.com (beelzebub.austin.arm.com [10.118.12.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id B02193F5AF; Fri, 25 Jan 2019 10:07:30 -0800 (PST) From: Jeremy Linton To: linux-arm-kernel@lists.infradead.org Cc: catalin.marinas@arm.com, will.deacon@arm.com, marc.zyngier@arm.com, suzuki.poulose@arm.com, dave.martin@arm.com, shankerd@codeaurora.org, linux-kernel@vger.kernel.org, ykaukab@suse.de, julien.thierry@arm.com, mlangsdo@redhat.com, steven.price@arm.com, stefan.wahren@i2se.com, Jeremy Linton Subject: [PATCH v4 09/12] arm64: Use firmware to detect CPUs that are not affected by Spectre-v2 Date: Fri, 25 Jan 2019 12:07:08 -0600 Message-Id: <20190125180711.1970973-10-jeremy.linton@arm.com> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20190125180711.1970973-1-jeremy.linton@arm.com> References: <20190125180711.1970973-1-jeremy.linton@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Marc Zyngier The SMCCC ARCH_WORKAROUND_1 service can indicate that although the firmware knows about the Spectre-v2 mitigation, this particular CPU is not vulnerable, and it is thus not necessary to call the firmware on this CPU. Let's use this information to our benefit. Signed-off-by: Marc Zyngier Signed-off-by: Jeremy Linton --- arch/arm64/kernel/cpu_errata.c | 32 +++++++++++++++++++++++--------- 1 file changed, 23 insertions(+), 9 deletions(-) -- 2.17.2 Reviewed-by: Andre Przywara diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c index 4d23b4d4cfa8..024c83ffff99 100644 --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -217,22 +217,36 @@ static int detect_harden_bp_fw(void) case PSCI_CONDUIT_HVC: arm_smccc_1_1_hvc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID, ARM_SMCCC_ARCH_WORKAROUND_1, &res); - if ((int)res.a0 < 0) + switch ((int)res.a0) { + case 1: + /* Firmware says we're just fine */ + return 0; + case 0: + cb = call_hvc_arch_workaround_1; + /* This is a guest, no need to patch KVM vectors */ + smccc_start = NULL; + smccc_end = NULL; + break; + default: return -1; - cb = call_hvc_arch_workaround_1; - /* This is a guest, no need to patch KVM vectors */ - smccc_start = NULL; - smccc_end = NULL; + } break; case PSCI_CONDUIT_SMC: arm_smccc_1_1_smc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID, ARM_SMCCC_ARCH_WORKAROUND_1, &res); - if ((int)res.a0 < 0) + switch ((int)res.a0) { + case 1: + /* Firmware says we're just fine */ + return 0; + case 0: + cb = call_smc_arch_workaround_1; + smccc_start = __smccc_workaround_1_smc_start; + smccc_end = __smccc_workaround_1_smc_end; + break; + default: return -1; - cb = call_smc_arch_workaround_1; - smccc_start = __smccc_workaround_1_smc_start; - smccc_end = __smccc_workaround_1_smc_end; + } break; default: