From patchwork Fri Apr 5 13:59:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 161854 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp472390jan; Fri, 5 Apr 2019 07:00:32 -0700 (PDT) X-Google-Smtp-Source: APXvYqyfBjHOIhB2o8IZlFv5EnjH93rXqDh1g5JpXvcaI3VZnXh7C7pBjMQ61kZ3zBxWZnDWa7ot X-Received: by 2002:a63:25c4:: with SMTP id l187mr12486992pgl.202.1554472832561; Fri, 05 Apr 2019 07:00:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1554472832; cv=none; d=google.com; s=arc-20160816; b=I+tL5TBvYKY6TT0oYKc6OnkQpr5V5j/Hf/MpiwZU8X04HoT2YgAuYKwUMOUPrYBYoL qsEEBrVTqSAQTUukHiaZpGpV3/yYZZb0tL8PNE0qXfnv6lgSoCTMIbyqNk2OlNUrXvuR hxxqrpFIhL/eQX00yJZ5KibCzsjCI61MsJpaK9ikOD6GMk3rBX0Lpn5sTo/1aOWo7C3v VPKVO/UIK6lmj9oI89Gj8+MW/0ZaIFijF2ZTv6MqHsKDltyyNyCckkFS1ES2vG0Yg0aR JvRhTBQPeeHkt01wKJ4nCOyEeQ01qX1CFQM1iyUMYiKnhUGJnN6EDT1ayCGGllM/PKVE OtvQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=fQiwrRVReJwiMKDv6V2n52kRntLS4bogTRoh9pZxx1k=; b=sdtGU9racnucaHjUjiKHuIxdueLTMZPesC+ni3BBb2HRp5UIzRp+WGPOtFHzcEOyc0 Wd3URGidozcAGQa6yeG9c1LMILqlbdsnWM8obpqxgMSPyUiZQWDyqG28HodVP328LidS LODgxEMqJ0oTuGJjfDz1Yo4nL0pljBWCPvaKtLazspCH80SqJrH5hcXPs+3V17YAVkqC mvEZBL7QDF37kFnoi9fkjfJE0k348TaX/WgFic3Mzrb2zXsg9MAEca63n0Uajz3lfkeB 6z9IiFcpJDs8vMJrECCO16/OFfDGl9/bDN0sYi9gMKIYdTPWFrALtiv/Tf+t1MezsbRe mXkQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j25si18965388pgb.531.2019.04.05.07.00.32; Fri, 05 Apr 2019 07:00:32 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731442AbfDEOAa (ORCPT + 31 others); Fri, 5 Apr 2019 10:00:30 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:49390 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731383AbfDEOA0 (ORCPT ); Fri, 5 Apr 2019 10:00:26 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 41E321A25; Fri, 5 Apr 2019 07:00:26 -0700 (PDT) Received: from fuggles.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 6958E3F68F; Fri, 5 Apr 2019 07:00:22 -0700 (PDT) From: Will Deacon To: linux-arch@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Will Deacon , "Paul E. McKenney" , Benjamin Herrenschmidt , Michael Ellerman , Arnd Bergmann , Peter Zijlstra , Andrea Parri , Palmer Dabbelt , Daniel Lustig , David Howells , Alan Stern , Linus Torvalds , "Maciej W. Rozycki" , Paul Burton , Ingo Molnar , Yoshinori Sato , Rich Felker , Tony Luck , Mikulas Patocka , Akira Yokosawa , Luis Chamberlain , Nicholas Piggin Subject: [PATCH v2 10/21] sh/mmiowb: Add unconditional mmiowb() to arch_spin_unlock() Date: Fri, 5 Apr 2019 14:59:25 +0100 Message-Id: <20190405135936.7266-11-will.deacon@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190405135936.7266-1-will.deacon@arm.com> References: <20190405135936.7266-1-will.deacon@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The mmiowb() macro is horribly difficult to use and drivers will continue to work most of the time if they omit a call when it is required. Rather than rely on driver authors getting this right, push mmiowb() into arch_spin_unlock() for sh. If this is deemed to be a performance issue, a subsequent optimisation could make use of ARCH_HAS_MMIOWB to elide the barrier in cases where no I/O writes were performed inside the critical section. Cc: Yoshinori Sato Cc: Rich Felker Signed-off-by: Will Deacon --- arch/sh/include/asm/Kbuild | 1 - arch/sh/include/asm/io.h | 3 --- arch/sh/include/asm/mmiowb.h | 12 ++++++++++++ arch/sh/include/asm/spinlock-llsc.h | 2 ++ 4 files changed, 14 insertions(+), 4 deletions(-) create mode 100644 arch/sh/include/asm/mmiowb.h -- 2.11.0 diff --git a/arch/sh/include/asm/Kbuild b/arch/sh/include/asm/Kbuild index 162c9054561f..7bf2cb680d32 100644 --- a/arch/sh/include/asm/Kbuild +++ b/arch/sh/include/asm/Kbuild @@ -14,7 +14,6 @@ generic-y += local.h generic-y += local64.h generic-y += mcs_spinlock.h generic-y += mm-arch-hooks.h -generic-y += mmiowb.h generic-y += parport.h generic-y += percpu.h generic-y += preempt.h diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h index 4f7f235f15f8..c28e37a344ad 100644 --- a/arch/sh/include/asm/io.h +++ b/arch/sh/include/asm/io.h @@ -229,9 +229,6 @@ __BUILD_IOPORT_STRING(q, u64) #define IO_SPACE_LIMIT 0xffffffff -/* synco on SH-4A, otherwise a nop */ -#define mmiowb() wmb() - /* We really want to try and get these to memcpy etc */ void memcpy_fromio(void *, const volatile void __iomem *, unsigned long); void memcpy_toio(volatile void __iomem *, const void *, unsigned long); diff --git a/arch/sh/include/asm/mmiowb.h b/arch/sh/include/asm/mmiowb.h new file mode 100644 index 000000000000..535d59735f1d --- /dev/null +++ b/arch/sh/include/asm/mmiowb.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __ASM_SH_MMIOWB_H +#define __ASM_SH_MMIOWB_H + +#include + +/* synco on SH-4A, otherwise a nop */ +#define mmiowb() wmb() + +#include + +#endif /* __ASM_SH_MMIOWB_H */ diff --git a/arch/sh/include/asm/spinlock-llsc.h b/arch/sh/include/asm/spinlock-llsc.h index 786ee0fde3b0..7fd929cd2e7a 100644 --- a/arch/sh/include/asm/spinlock-llsc.h +++ b/arch/sh/include/asm/spinlock-llsc.h @@ -47,6 +47,8 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock) { unsigned long tmp; + /* This could be optimised with ARCH_HAS_MMIOWB */ + mmiowb(); __asm__ __volatile__ ( "mov #1, %0 ! arch_spin_unlock \n\t" "mov.l %0, @%1 \n\t"