From patchwork Sun Oct 27 21:00:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg KH X-Patchwork-Id: 177876 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp2551538ill; Sun, 27 Oct 2019 14:34:46 -0700 (PDT) X-Google-Smtp-Source: APXvYqwvphqL8RyBFcYDxR68wndd290GHVqz68x9kYW7u7Bzo95U+gFoZ8eGXePaN5/h3Csq5E4X X-Received: by 2002:a17:906:2d68:: with SMTP id f8mr13652167eji.71.1572212086756; Sun, 27 Oct 2019 14:34:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572212086; cv=none; d=google.com; s=arc-20160816; b=AigvbvSkY+ygGng9f1E8i+YmNNtsHCbMCZBzDeHHPUXLu7ZVOF6MjTaP/AgDpG0/Yf p8vhXuO4fh07p0VIdt60OmslTghNwV3nCzO85pwK4ACxjNfmGdOKkezF0UHmDQ2bq5Cz NJvOEGm1FiFwC35M4F5Erh27/aFNN5DWooZSMkJHfUcxr4vGRr3x0UE/PU+TtkqXPKhM 6EEI+evGa+pmG3oLPF31Vn1TKHSuq/wXyJJLqY3yEIwgb98Ei8FNZtt/jDIDDO8n1n9s VwT3yhMkonix1/twRVvmuAwvnD1zdV0nVzDSauokvo1HB5dTk1eJmAHV6zyD/oqUxzHc GojA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=zam8p5vvyk+Hc6aVWb/aECH6pZPEvOXW1V1MS/c8ZM4=; b=eQPxQ36eH2dFuZCDYrYo0mbUZTvKdJBSik8Sdfl8HNBmP6euONFizIo+SpYP3KzjNZ RxWv8YWavAgkP3XbWpojxrXjbQ5XK5AEmKP3vnDqMvf0h8LG9Q9xw9AHP6YvCQghPOVR 68NJ0cpMtd8E5EFxo+ctrT+D6FEr8o33YIynSys5VFfCKbn9sUD0zVAQ2B7b63P0XwBG nTKgFUnhHMa47kc4h4KhKLmKcyX0G+vojmnH5VOGb5jV2GzeZv+dcrcDEU6skLGrQdoD zQLVTdLFIz6MGIIMPfIBOthsVLSTLn7xyyKrivZ6zAzkZeBDzAuaE8S6S8CblJToIA6R NFMQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=cyX2DEOC; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f5si6209515edf.232.2019.10.27.14.34.46; Sun, 27 Oct 2019 14:34:46 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=cyX2DEOC; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730891AbfJ0Veo (ORCPT + 26 others); Sun, 27 Oct 2019 17:34:44 -0400 Received: from mail.kernel.org ([198.145.29.99]:56716 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729659AbfJ0VKU (ORCPT ); Sun, 27 Oct 2019 17:10:20 -0400 Received: from localhost (100.50.158.77.rev.sfr.net [77.158.50.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 2F32920B7C; Sun, 27 Oct 2019 21:10:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1572210618; bh=tSqkmqnfXoX2DXObang/oy5lGOvr0Kq+arr3Bk2N6kE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cyX2DEOCCA+SqZ2oE9aA7WQNhJs9Z42WDet7Qez4AhpC5yebv6rtah3LAgzfNc6jt lYoIGh46LTJzpsAl19CaP9UKv1zMDLx7aZGds9iqrPrNxf3O4GXTh9IJCNz14AOhxM Qosb5DOneHWJTtYDwUpz9gnBvm11bJg+e61Nwc2E= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Greg Kroah-Hartman , Jeremy Linton , Andre Przywara , Catalin Marinas , Stefan Wahren , Will Deacon , Ard Biesheuvel Subject: [PATCH 4.14 078/119] arm64: Always enable spectre-v2 vulnerability detection Date: Sun, 27 Oct 2019 22:00:55 +0100 Message-Id: <20191027203344.153460145@linuxfoundation.org> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191027203259.948006506@linuxfoundation.org> References: <20191027203259.948006506@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Jeremy Linton [ Upstream commit 8c1e3d2bb44cbb998cb28ff9a18f105fee7f1eb3 ] Ensure we are always able to detect whether or not the CPU is affected by Spectre-v2, so that we can later advertise this to userspace. Signed-off-by: Jeremy Linton Reviewed-by: Andre Przywara Reviewed-by: Catalin Marinas Tested-by: Stefan Wahren Signed-off-by: Will Deacon Signed-off-by: Ard Biesheuvel Signed-off-by: Greg Kroah-Hartman --- arch/arm64/kernel/cpu_errata.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -76,7 +76,6 @@ cpu_enable_trap_ctr_access(const struct config_sctlr_el1(SCTLR_EL1_UCT, 0); } -#ifdef CONFIG_HARDEN_BRANCH_PREDICTOR #include #include @@ -217,11 +216,11 @@ static int detect_harden_bp_fw(void) ((midr & MIDR_CPU_MODEL_MASK) == MIDR_QCOM_FALKOR_V1)) cb = qcom_link_stack_sanitization; - install_bp_hardening_cb(cb, smccc_start, smccc_end); + if (IS_ENABLED(CONFIG_HARDEN_BRANCH_PREDICTOR)) + install_bp_hardening_cb(cb, smccc_start, smccc_end); return 1; } -#endif /* CONFIG_HARDEN_BRANCH_PREDICTOR */ DEFINE_PER_CPU_READ_MOSTLY(u64, arm64_ssbd_callback_required); @@ -457,7 +456,6 @@ out_printmsg: .type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM, \ CAP_MIDR_RANGE_LIST(midr_list) -#ifdef CONFIG_HARDEN_BRANCH_PREDICTOR /* * List of CPUs that do not need any Spectre-v2 mitigation at all. */ @@ -489,6 +487,12 @@ check_branch_predictor(const struct arm6 if (!need_wa) return false; + if (!IS_ENABLED(CONFIG_HARDEN_BRANCH_PREDICTOR)) { + pr_warn_once("spectrev2 mitigation disabled by kernel configuration\n"); + __hardenbp_enab = false; + return false; + } + /* forced off */ if (__nospectre_v2) { pr_info_once("spectrev2 mitigation disabled by command line option\n"); @@ -500,7 +504,6 @@ check_branch_predictor(const struct arm6 return (need_wa > 0); } -#endif const struct arm64_cpu_capabilities arm64_errata[] = { #if defined(CONFIG_ARM64_ERRATUM_826319) || \ @@ -640,13 +643,11 @@ const struct arm64_cpu_capabilities arm6 ERRATA_MIDR_ALL_VERSIONS(MIDR_CORTEX_A73), }, #endif -#ifdef CONFIG_HARDEN_BRANCH_PREDICTOR { .capability = ARM64_HARDEN_BRANCH_PREDICTOR, .type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM, .matches = check_branch_predictor, }, -#endif { .desc = "Speculative Store Bypass Disable", .type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM,