From patchwork Sun Nov 17 07:21:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 179567 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp1380448ilf; Sat, 16 Nov 2019 23:21:36 -0800 (PST) X-Google-Smtp-Source: APXvYqyuiCvm7DIBHClhsuE6mpLj0syjElUL7zDHwu66tqUybTI2CfLhSnLNKvJ6eUpfVnEKFtx2 X-Received: by 2002:a17:906:c57:: with SMTP id t23mr16079154ejf.240.1573975296307; Sat, 16 Nov 2019 23:21:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573975296; cv=none; d=google.com; s=arc-20160816; b=CL4+RimVemQUSMTYaeWlqtDiso7er/sCtEnlhxQ09A/gKkBNAjGD9ZDkmdiBV/Elwb 2z2DNLIV8V7I/Yh37qypj57bS5WyPZOQr2c+ppFTofZ+TYWmwvRKWc3hQ5+Zr8RzrPPg LT2YrcRqWoc6u715djAxR9BqrdaiUUWIZPKVSrIzz57z87vdV1BU0ice5weartYH2zPl xAvkONc8vbL1I3GbocjNwGNgBjy8HL/OFLYIvxIkMNwtFQ40wKSNU1nEVX7w9WzOFXlw ogSzIPsJoJnaWsRx8qnV7H2anEm/CYKAGa+k0jxPi4NpIvyC4RYi/Xasx+k1XE8hapS7 t7Vw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=KU2C+bG1Ml8PB4zUJ4MneWG/dNVNqhcuPBGu8Tqa/Yc=; b=XHd+wI+eUHDLIHTZJAPGFDtkbFgmUl607bO219+R3dTNP4qS6fv1hc0Vvkt3rDL7SI RYWnWwIYzVN53ple/hFV9vaD4tGs9ryfQ9lpv0KpFyxkC+QTsABaHsGkvH1d8J0sLqyb msCeeBQ+uFJJKmqIKizsxmXQFhnRoWvkh0jU3oOIsL/zq+T1J6ISfmbA7Xlf6wo+3d47 X5hKwxI4ncuQxEIsOkRRfXfSiJePc5AUxVZCq/g/fd06n/21U5u9AitatoaKREtYt7UV 3snZ/s3+YLIjZrLxdKWD8adAB/h2lgZJAzCZLd464+6szaDgu/GTdrHwDDP+w8tepOV7 iKsA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q20si9182013eja.339.2019.11.16.23.21.36; Sat, 16 Nov 2019 23:21:36 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726257AbfKQHVb (ORCPT + 26 others); Sun, 17 Nov 2019 02:21:31 -0500 Received: from mx2.suse.de ([195.135.220.15]:40812 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1725909AbfKQHVX (ORCPT ); Sun, 17 Nov 2019 02:21:23 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 41726B315; Sun, 17 Nov 2019 07:21:22 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v3 7/8] ARM: dts: rtd1195: Add UART resets Date: Sun, 17 Nov 2019 08:21:08 +0100 Message-Id: <20191117072109.20402-8-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191117072109.20402-1-afaerber@suse.de> References: <20191117072109.20402-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Associate the UART nodes with the corresponding reset controller bits. Signed-off-by: Andreas Färber --- v3: from RTD1295 reset v2 * Rebased onto r-bus arch/arm/boot/dts/rtd1195.dtsi | 3 +++ 1 file changed, 3 insertions(+) -- 2.16.4 diff --git a/arch/arm/boot/dts/rtd1195.dtsi b/arch/arm/boot/dts/rtd1195.dtsi index e0f133a1354f..4eec45244132 100644 --- a/arch/arm/boot/dts/rtd1195.dtsi +++ b/arch/arm/boot/dts/rtd1195.dtsi @@ -8,6 +8,7 @@ /memreserve/ 0x17fff000 0x00001000; #include +#include / { compatible = "realtek,rtd1195"; @@ -134,6 +135,7 @@ reg = <0x7800 0x400>; reg-shift = <2>; reg-io-width = <4>; + resets = <&iso_reset RTD1195_ISO_RSTN_UR0>; clock-frequency = <27000000>; status = "disabled"; }; @@ -143,6 +145,7 @@ reg = <0x1b200 0x100>; reg-shift = <2>; reg-io-width = <4>; + resets = <&reset2 RTD1195_RSTN_UR1>; clock-frequency = <27000000>; status = "disabled"; };