From patchwork Tue Sep 26 12:17:13 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 114260 Delivered-To: patch@linaro.org Received: by 10.140.106.117 with SMTP id d108csp3761575qgf; Tue, 26 Sep 2017 05:20:17 -0700 (PDT) X-Google-Smtp-Source: AOwi7QDzSQBmzAgk+qfTuPX5VtUnnD2W3KNZYD76jqmdZw8leWLv8JPuebInUxMl1w8w1+3xdSIj X-Received: by 10.99.109.65 with SMTP id i62mr10593493pgc.83.1506428417179; Tue, 26 Sep 2017 05:20:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1506428417; cv=none; d=google.com; s=arc-20160816; b=RkbdSR0FvlzOOmK9ZarkGkvArCoTPkhWAyXJ8bYZLVFcgRoCI1rBAYnZRe2s2JVY1O Btrt+VgGwWM6+73dUz/v1bpt7MRIc+Gh7dMhn0JEzGe/41ivZKNuLGz30ySwkoft1mWR Z0tszM8oloPay/MXxVAUKJXMmXpt5zOwoJTFBLpwSWPnSxXK0HnTvp1LnET0UOmniakk zzLmO4MEhP/ENOl+cQ8CvRrvxshwr/cx4qm32PY+bO/Tdrjdpe4Fu7gDzuMhE+CEtNFv wr72oOsnOJgZ5VdMpI/kvu9d/UHBNG+YSocBVJnt0ewkkRArlbq9dyZ15UbEhNOPjw+m fZkQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=Vjk3s/goEe/fPvEnnqfj8jasWQsRylkalrYmpNC8iNk=; b=T6OXMNoLCGd4IyYskUgsApQi4ZvDbAJHdlKp5cY6ews15YZZU3YQapHQvQe7bse2fX jMXqvHJyxLBtoiphyJ1XtxJ+Hgse/Zu16KftvV9u4hH88cXlnoVX51kLmuFv1ztYzsw6 xVUNBkgyEfltQrcSL6E0U8KuFQ7RfTt1+HbLKlCQ/Tfwg4w50Of6EKZec0TI3222Y5wp JK7CvurH5+O/5HGxTZ7o+X/dwe3R65ZR2YNl0Lsw3d9DsUt8vGRh/hRm9L760P1D1+lj jd3x5WCX5wF445n1s883kjd4QI0LjdJsNV7Up6CDk0rJN2fCdsQUpwj0lzFTBOOINcBs fW7Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g65si4316580pfj.186.2017.09.26.05.20.16; Tue, 26 Sep 2017 05:20:17 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S968648AbdIZMUA (ORCPT + 26 others); Tue, 26 Sep 2017 08:20:00 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:52111 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S966189AbdIZMSH (ORCPT ); Tue, 26 Sep 2017 08:18:07 -0400 Received: by mail.free-electrons.com (Postfix, from userid 110) id 3615320846; Tue, 26 Sep 2017 14:18:05 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost.localdomain (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id D7C7E20860; Tue, 26 Sep 2017 14:17:54 +0200 (CEST) From: Quentin Schulz To: linus.walleij@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, wens@csie.org, linux@armlinux.org.uk, maxime.ripard@free-electrons.com, lee.jones@linaro.org Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@googlegroups.com, thomas.petazzoni@free-electrons.com, Quentin Schulz Subject: [PATCH v2 03/10] pinctrl: axp209: use drv_data of pinctrl_pin_desc to store pin reg Date: Tue, 26 Sep 2017 14:17:13 +0200 Message-Id: <7993a30fbc2e50a2d228fa0c8fad643c4034b101.1506428208.git-series.quentin.schulz@free-electrons.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Instead of using a function to retrieve each pin's correct control register, use drv_data within pinctrl_pin_desc to store the ctrl reg. Remove axp20x_gpio_get_reg and replace every occurrence by a get from drv_data. Signed-off-by: Quentin Schulz --- drivers/pinctrl/pinctrl-axp209.c | 42 +++++++-------------------------- 1 file changed, 9 insertions(+), 33 deletions(-) -- git-series 0.9.1 diff --git a/drivers/pinctrl/pinctrl-axp209.c b/drivers/pinctrl/pinctrl-axp209.c index b35e8dd..4bbcba2 100644 --- a/drivers/pinctrl/pinctrl-axp209.c +++ b/drivers/pinctrl/pinctrl-axp209.c @@ -32,10 +32,11 @@ #define AXP20X_GPIO_FUNCTION_OUT_HIGH 1 #define AXP20X_GPIO_FUNCTION_INPUT 2 -#define AXP20X_PINCTRL_PIN(_pin_num, _pin) \ +#define AXP20X_PINCTRL_PIN(_pin_num, _pin, _regs) \ { \ .number = _pin_num, \ .name = _pin, \ + .drv_data = _regs, \ } #define AXP20X_PIN(_pin, ...) \ @@ -91,17 +92,17 @@ struct axp20x_gpio { }; static const struct axp20x_desc_pin axp209_pins[] = { - AXP20X_PIN(AXP20X_PINCTRL_PIN(0, "GPIO0"), + AXP20X_PIN(AXP20X_PINCTRL_PIN(0, "GPIO0", (void *)AXP20X_GPIO0_CTRL), AXP20X_FUNCTION(0x0, "gpio_out"), AXP20X_FUNCTION(0x2, "gpio_in"), AXP20X_FUNCTION(0x3, "ldo"), AXP20X_FUNCTION(0x4, "adc")), - AXP20X_PIN(AXP20X_PINCTRL_PIN(1, "GPIO1"), + AXP20X_PIN(AXP20X_PINCTRL_PIN(1, "GPIO1", (void *)AXP20X_GPIO1_CTRL), AXP20X_FUNCTION(0x0, "gpio_out"), AXP20X_FUNCTION(0x2, "gpio_in"), AXP20X_FUNCTION(0x3, "ldo"), AXP20X_FUNCTION(0x4, "adc")), - AXP20X_PIN(AXP20X_PINCTRL_PIN(2, "GPIO2"), + AXP20X_PIN(AXP20X_PINCTRL_PIN(2, "GPIO2", (void *)AXP20X_GPIO2_CTRL), AXP20X_FUNCTION(0x0, "gpio_out"), AXP20X_FUNCTION(0x2, "gpio_in")), }; @@ -111,20 +112,6 @@ static const struct axp20x_pinctrl_desc axp20x_pinctrl_data = { .npins = ARRAY_SIZE(axp209_pins), }; -static int axp20x_gpio_get_reg(unsigned offset) -{ - switch (offset) { - case 0: - return AXP20X_GPIO0_CTRL; - case 1: - return AXP20X_GPIO1_CTRL; - case 2: - return AXP20X_GPIO2_CTRL; - } - - return -EINVAL; -} - static int axp20x_gpio_input(struct gpio_chip *chip, unsigned offset) { return pinctrl_gpio_direction_input(chip->base + offset); @@ -146,12 +133,9 @@ static int axp20x_gpio_get(struct gpio_chip *chip, unsigned offset) static int axp20x_gpio_get_direction(struct gpio_chip *chip, unsigned offset) { struct axp20x_gpio *gpio = gpiochip_get_data(chip); + int reg = (int)gpio->desc->pins[offset].pin.drv_data; unsigned int val; - int reg, ret; - - reg = axp20x_gpio_get_reg(offset); - if (reg < 0) - return reg; + int ret; ret = regmap_read(gpio->regmap, reg, &val); if (ret) @@ -184,11 +168,7 @@ static void axp20x_gpio_set(struct gpio_chip *chip, unsigned offset, int value) { struct axp20x_gpio *gpio = gpiochip_get_data(chip); - int reg; - - reg = axp20x_gpio_get_reg(offset); - if (reg < 0) - return; + int reg = (int)gpio->desc->pins[offset].pin.drv_data; regmap_update_bits(gpio->regmap, reg, AXP20X_GPIO_FUNCTIONS, @@ -200,11 +180,7 @@ static int axp20x_pmx_set(struct pinctrl_dev *pctldev, unsigned int offset, u8 config) { struct axp20x_gpio *gpio = pinctrl_dev_get_drvdata(pctldev); - int reg; - - reg = axp20x_gpio_get_reg(offset); - if (reg < 0) - return reg; + int reg = (int)gpio->desc->pins[offset].pin.drv_data; return regmap_update_bits(gpio->regmap, reg, AXP20X_GPIO_FUNCTIONS, config);