From patchwork Wed Jan 10 03:47:38 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 124005 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp4789577qgn; Tue, 9 Jan 2018 19:49:51 -0800 (PST) X-Google-Smtp-Source: ACJfBotO35o5UCzOuhnzbxTSmlIqL6LWCMXkQ4xh3lVd61Bbbd29RZYk7cWqJBQFUjSURJlzPIU+ X-Received: by 10.101.67.1 with SMTP id j1mr14169131pgq.204.1515556191463; Tue, 09 Jan 2018 19:49:51 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1515556191; cv=none; d=google.com; s=arc-20160816; b=OOKhlqKYHH+h0YRaAbXZxzycKjW4mwie8utnBngbqsA9kqNxzKeh0JP7UPPdz2Y0yk Clh9QKrkn5ycO5x/1j2Fv0mkDWj/a/qYzqwPPU24o7f+jQluPD0hjy64CJ3N9Vn7VKwd QCDNtx9ml/44spefDgilcv0ZRc+9ovofUq9FSjECjGYro38aSeby98Oz+31UheHxBxEh Nd7bFmi7E+lSHPOO44vNElSCh1NjlOmKMy4slq0KgO2HKIHLI4GZcsv9aMwHWUHpzyOn WixG/LLf9oU/9A7ay5CCC29H+Wj0EvlSSe78gMWqrlbP2QDLIiWsgmkMPs7v4cALApNW ft6Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=n4ehJD1+yKwW2AxoOUVUm5GlfZ51/lPswpnsFynL80s=; b=WWzCi7hMGVmsK5bOlep3NvFAIvgIq/m8CU27pegquPcTukT+Sx0xeRXHEdxRpfVIzq fFpLvwXbeyWboDEos4Ul4tfntracvjVfsfWYfSGbHeFGK1URWoJwQSvcv1xUJPcV6GDW +vM08Zw5Op46eB27//WLCWOn+Nn61JjboMXDsvEDlIbBfRTAwxXJ1pjQRZ3+kFQBI9u7 KJxYyXYFaDUywLXpc8ZgLt5AoWNuHFuvQyjh7bi9YT7zf9gMU4gPceK6KqMWq4hcMoUu fa4EoPADkMQ/ICfSdgN8x+WQ3zM5E2VL6AX8DHFtufQFXv6xGULFf8QvDLvahlN1E9sC 5e/g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=i+lzdR/j; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v3si11401955plb.385.2018.01.09.19.49.51; Tue, 09 Jan 2018 19:49:51 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=i+lzdR/j; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755773AbeAJDtf (ORCPT + 28 others); Tue, 9 Jan 2018 22:49:35 -0500 Received: from mail-pg0-f68.google.com ([74.125.83.68]:37905 "EHLO mail-pg0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965215AbeAJDsR (ORCPT ); Tue, 9 Jan 2018 22:48:17 -0500 Received: by mail-pg0-f68.google.com with SMTP id t67so9804527pgc.5 for ; Tue, 09 Jan 2018 19:48:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=n4ehJD1+yKwW2AxoOUVUm5GlfZ51/lPswpnsFynL80s=; b=i+lzdR/jF0XouKb8ojIpZJcfapSG+jJjoGy2gDHahhsKn5pdzHycsgy5cjYN10tqFl LBp5Ho51ru7uHXL27o6t8vu69+9axTcQV0Ks8LLbTfBSFDQk73W1BNMCIJxOsY9omVcm VUyEJcKSLdtrjU7L+Aim4rfYB92q4sVfb0cP0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=n4ehJD1+yKwW2AxoOUVUm5GlfZ51/lPswpnsFynL80s=; b=l/n+Qqy/FatKiPMiXFVRdJi+VrnANEWI3vmf9pn48EduJkWUt7q+NXT264Ver4/SLa AUl0iaHKVnGJH6QRVwk3ps+Q4rIcw8SKeQbaKH7yZamdACM2Qneja30BKdVVMITLf5QV iXTMl2W+z8xQGQWh5x6vKXYjmbyzFBGsa5ctKqPEmXQ7o3WXV61kv2sRmSBm24ktZr5m XTuETOgOo6JoThbQvdmIoaMsVl0gF78hQiiFl+mKZaPPJoitK2bZ/b+u/IitFe11kyEy ncYxoxaD9tCWozpbnQSkMxHNX8QOiJ9X4VOnrtIDrML7VUBCmnh3D0eHVyq+Hzv/a59H abcA== X-Gm-Message-State: AKGB3mLrU3HoKtZSxzoHWS1CMHotg2xpnN4JM3qUgie0OinNTHUG/tpt 7mto/zvpcNsjmsuCAq6XqBBDKw== X-Received: by 10.101.75.5 with SMTP id r5mr14132313pgq.215.1515556096583; Tue, 09 Jan 2018 19:48:16 -0800 (PST) Received: from localhost ([122.172.19.39]) by smtp.gmail.com with ESMTPSA id n65sm32723876pfa.83.2018.01.09.19.48.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 09 Jan 2018 19:48:16 -0800 (PST) From: Viresh Kumar To: Greg Kroah-Hartman Cc: Viresh Kumar , Vincent Guittot , Stephen Boyd , Rajendra Nayak , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, robdclark@gmail.com, s.hauer@pengutronix.de, l.stach@pengutronix.de, shawnguo@kernel.org, fabio.estevam@nxp.com, nm@ti.com, xuwei5@hisilicon.com, robh+dt@kernel.org Subject: [PATCH V6 09/13] boot_constraint: Add support for Hisilicon platforms Date: Wed, 10 Jan 2018 09:17:38 +0530 Message-Id: <9cfb77e0d4c823630013d262dbdc7b8ae7f9eaca.1515554879.git.viresh.kumar@linaro.org> X-Mailer: git-send-email 2.15.0.194.g9af6a3dea062 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This adds boot constraint support for Hisilicon platforms. Currently only one use case is supported: earlycon. One of the UART is enabled by the bootloader and is used for early console in the kernel. The boot constraint core handles it properly and removes constraints once the serial device is probed by its driver. This is tested on hi6220-hikey 96board. Signed-off-by: Viresh Kumar --- arch/arm64/Kconfig.platforms | 1 + drivers/boot_constraint/Makefile | 2 + drivers/boot_constraint/hikey.c | 158 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 161 insertions(+) create mode 100644 drivers/boot_constraint/hikey.c -- 2.15.0.194.g9af6a3dea062 diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index 2401373565ff..a586ed728393 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -87,6 +87,7 @@ config ARCH_HISI select ARM_TIMER_SP804 select HISILICON_IRQ_MBIGEN if PCI select PINCTRL + select DEV_BOOT_CONSTRAINT help This enables support for Hisilicon ARMv8 SoC family diff --git a/drivers/boot_constraint/Makefile b/drivers/boot_constraint/Makefile index a765094623a3..5609280162c4 100644 --- a/drivers/boot_constraint/Makefile +++ b/drivers/boot_constraint/Makefile @@ -1,3 +1,5 @@ # Makefile for device boot constraints obj-y := clk.o deferrable_dev.o core.o pm.o supply.o + +obj-$(CONFIG_ARCH_HISI) += hikey.o diff --git a/drivers/boot_constraint/hikey.c b/drivers/boot_constraint/hikey.c new file mode 100644 index 000000000000..25acb4070569 --- /dev/null +++ b/drivers/boot_constraint/hikey.c @@ -0,0 +1,158 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * This takes care of Hisilicon boot time device constraints, normally set by + * the Bootloader. + * + * Copyright (C) 2017 Linaro. + * Viresh Kumar + */ + +#include +#include +#include +#include + +static bool earlycon_boot_constraints_enabled __initdata; + +static int __init enable_earlycon_boot_constraints(char *str) +{ + earlycon_boot_constraints_enabled = true; + + return 0; +} + +__setup_param("earlycon", boot_constraint_earlycon, + enable_earlycon_boot_constraints, 0); +__setup_param("earlyprintk", boot_constraint_earlyprintk, + enable_earlycon_boot_constraints, 0); + + +struct hikey_machine_constraints { + struct dev_boot_constraint_of *dev_constraints; + unsigned int count; +}; + +static struct dev_boot_constraint_clk_info uart_iclk_info = { + .name = "uartclk", +}; + +static struct dev_boot_constraint_clk_info uart_pclk_info = { + .name = "apb_pclk", +}; + +static struct dev_boot_constraint hikey3660_uart_constraints[] = { + { + .type = DEV_BOOT_CONSTRAINT_CLK, + .data = &uart_iclk_info, + }, { + .type = DEV_BOOT_CONSTRAINT_CLK, + .data = &uart_pclk_info, + }, +}; + +static const char * const uarts_hikey3660[] = { + "serial@fff32000", /* UART 6 */ +}; + +static struct dev_boot_constraint_of hikey3660_dev_constraints[] = { + { + .compat = "arm,pl011", + .constraints = hikey3660_uart_constraints, + .count = ARRAY_SIZE(hikey3660_uart_constraints), + + .dev_names = uarts_hikey3660, + .dev_names_count = ARRAY_SIZE(uarts_hikey3660), + }, +}; + +static struct hikey_machine_constraints hikey3660_constraints = { + .dev_constraints = hikey3660_dev_constraints, + .count = ARRAY_SIZE(hikey3660_dev_constraints), +}; + +static const char * const uarts_hikey6220[] = { + "uart@f7113000", /* UART 3 */ +}; + +static struct dev_boot_constraint_of hikey6220_dev_constraints[] = { + { + .compat = "arm,pl011", + .constraints = hikey3660_uart_constraints, + .count = ARRAY_SIZE(hikey3660_uart_constraints), + + .dev_names = uarts_hikey6220, + .dev_names_count = ARRAY_SIZE(uarts_hikey6220), + }, +}; + +static struct hikey_machine_constraints hikey6220_constraints = { + .dev_constraints = hikey6220_dev_constraints, + .count = ARRAY_SIZE(hikey6220_dev_constraints), +}; + +static struct dev_boot_constraint hikey3798cv200_uart_constraints[] = { + { + .type = DEV_BOOT_CONSTRAINT_CLK, + .data = &uart_pclk_info, + }, +}; + +static const char * const uarts_hikey3798cv200[] = { + "serial@8b00000", /* UART 0 */ +}; + +static struct dev_boot_constraint_of hikey3798cv200_dev_constraints[] = { + { + .compat = "arm,pl011", + .constraints = hikey3798cv200_uart_constraints, + .count = ARRAY_SIZE(hikey3798cv200_uart_constraints), + + .dev_names = uarts_hikey3798cv200, + .dev_names_count = ARRAY_SIZE(uarts_hikey3798cv200), + }, +}; + +static struct hikey_machine_constraints hikey3798cv200_constraints = { + .dev_constraints = hikey3798cv200_dev_constraints, + .count = ARRAY_SIZE(hikey3798cv200_dev_constraints), +}; + +static const struct of_device_id machines[] __initconst = { + { .compatible = "hisilicon,hi3660", .data = &hikey3660_constraints }, + { .compatible = "hisilicon,hi3798cv200", .data = &hikey3798cv200_constraints }, + { .compatible = "hisilicon,hi6220", .data = &hikey6220_constraints }, + { } +}; + +static int __init hikey_constraints_init(void) +{ + const struct hikey_machine_constraints *constraints; + const struct of_device_id *match; + struct device_node *np; + + if (!earlycon_boot_constraints_enabled) + return 0; + + np = of_find_node_by_path("/"); + if (!np) + return -ENODEV; + + match = of_match_node(machines, np); + of_node_put(np); + + if (!match) + return 0; + + constraints = match->data; + + dev_boot_constraint_add_deferrable_of(constraints->dev_constraints, + constraints->count); + + return 0; +} + +/* + * The amba-pl011 driver registers itself from arch_initcall level. Setup the + * serial boot constraints before that in order not to miss any boot messages. + */ +postcore_initcall_sync(hikey_constraints_init);