From patchwork Tue Sep 26 12:17:16 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 114255 Delivered-To: patch@linaro.org Received: by 10.140.106.117 with SMTP id d108csp3759606qgf; Tue, 26 Sep 2017 05:18:21 -0700 (PDT) X-Google-Smtp-Source: AOwi7QAbigRWyLlYmLERDcVwy7LvjI5ufgC6GJ2GqGHMqTG27fBaxn+k+D2gF4iX5mWr38YoALbM X-Received: by 10.99.175.14 with SMTP id w14mr10954604pge.365.1506428301623; Tue, 26 Sep 2017 05:18:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1506428301; cv=none; d=google.com; s=arc-20160816; b=VFS7CeT1Ag41o7m3pARi1czogO7xwzeEuX4iZwT1JdnZPgHQ91dlIBmXHrjy693xsr 59uInrnTWBx8VVBh2hI+S+kS6eeynbwq9T/jz3ifeq3BpIdp80L5DCO7OBI+Ju3NnWRA l++9t7FCg9q4SVVJF6+zCriTQM/pt47OhZz5ybjw00mmbd3SDxB3JEtx6xTsiybQiNCG 8wdwOtaDbM+/LH+AvkHK4wAxfKvB3zMZHSAutb2mtVzdW6vFRfAX26/kxy8pNPNhLNS7 9T8GQJ4ssqYdwxHXD7EkTAhNrdoPC/oARnLvfXmUcIv7Ak39GGzRB7JPEJOxUWYEVprd sL4A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=y6C+GrHJmDEqqkSib3M5E9etKZUCsMmRJqFBo7P9Uk0=; b=SHLKWW6gYd9+xVV5Y7/W8wrpBK6cHH93ZlGAYJOKwSlwxldFWLCri6OWYf/RS+9bQP eqcZw1cwIVHSDnOh62NgRyhYmHQFna9/3EAcnhbAzrYM8grsSRllfdp9zjjqgiJuIdl9 WMtUC3mpmWUFSkywGOvM4odux884Eg3ALdLYxpM0L4YTM92SVsuHuhIW7BqOn/Qoxwem +b/CdyzwqqYjIB4lep0BG3NV4G0vqFzC4bq7z84kLY4dCw4gHd9qLlbV1E/rDRq8a85D g2U/f6rgVm/QXVTyLk6/cgt7PQTxeeI9aHY+2VtCjPjj3cDx0+scdD20uXl/J0l0u4yu /rGg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 82si1192479pfx.595.2017.09.26.05.18.21; Tue, 26 Sep 2017 05:18:21 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1030593AbdIZMST (ORCPT + 26 others); Tue, 26 Sep 2017 08:18:19 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:52143 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S968589AbdIZMSQ (ORCPT ); Tue, 26 Sep 2017 08:18:16 -0400 Received: by mail.free-electrons.com (Postfix, from userid 110) id 5579220933; Tue, 26 Sep 2017 14:18:14 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost.localdomain (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id D3F582088F; Tue, 26 Sep 2017 14:17:55 +0200 (CEST) From: Quentin Schulz To: linus.walleij@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, wens@csie.org, linux@armlinux.org.uk, maxime.ripard@free-electrons.com, lee.jones@linaro.org Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@googlegroups.com, thomas.petazzoni@free-electrons.com, Quentin Schulz Subject: [PATCH v2 06/10] pinctrl: axp209: add support for AXP813 GPIOs Date: Tue, 26 Sep 2017 14:17:16 +0200 Message-Id: X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The AXP813 has only two GPIOs. GPIO0 can either be used as a GPIO, an LDO regulator or an ADC. GPIO1 can be used either as a GPIO or an LDO regulator. Moreover, the status bit of the GPIOs when in input mode is not offset by 4 unlike the AXP209. Signed-off-by: Quentin Schulz --- Documentation/devicetree/bindings/pinctrl/pinctrl-axp209.txt | 13 ++- drivers/pinctrl/pinctrl-axp209.c | 30 ++++++- 2 files changed, 39 insertions(+), 4 deletions(-) -- git-series 0.9.1 diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-axp209.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-axp209.txt index a5bfe87..a1d5dec 100644 --- a/Documentation/devicetree/bindings/pinctrl/pinctrl-axp209.txt +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-axp209.txt @@ -4,7 +4,9 @@ This driver follows the usual GPIO bindings found in Documentation/devicetree/bindings/gpio/gpio.txt Required properties: -- compatible: Should be "x-powers,axp209-gpio" +- compatible: Should be one of: + - "x-powers,axp209-gpio" + - "x-powers,axp813-pctl" - #gpio-cells: Should be two. The first cell is the pin number and the second is the GPIO flags. - gpio-controller: Marks the device node as a GPIO controller. @@ -49,8 +51,17 @@ Example: GPIOs and their functions ------------------------- +axp209 +------ GPIO | Functions ------------------------ GPIO0 | gpio_in, gpio_out, ldo, adc GPIO1 | gpio_in, gpio_out, ldo, adc GPIO2 | gpio_in, gpio_out + +axp813 +------ +GPIO | Functions +------------------------ +GPIO0 | gpio_in, gpio_out, ldo, adc +GPIO1 | gpio_in, gpio_out, ldo diff --git a/drivers/pinctrl/pinctrl-axp209.c b/drivers/pinctrl/pinctrl-axp209.c index 11f871e..500862b 100644 --- a/drivers/pinctrl/pinctrl-axp209.c +++ b/drivers/pinctrl/pinctrl-axp209.c @@ -108,11 +108,28 @@ static const struct axp20x_desc_pin axp209_pins[] = { AXP20X_FUNCTION(0x2, "gpio_in")), }; +static const struct axp20x_desc_pin axp813_pins[] = { + AXP20X_PIN(AXP20X_PINCTRL_PIN(0, "GPIO0", (void *)AXP20X_GPIO0_CTRL), + AXP20X_FUNCTION(0x0, "gpio_out"), + AXP20X_FUNCTION(0x2, "gpio_in"), + AXP20X_FUNCTION(0x3, "ldo"), + AXP20X_FUNCTION(0x4, "adc")), + AXP20X_PIN(AXP20X_PINCTRL_PIN(1, "GPIO1", (void *)AXP20X_GPIO1_CTRL), + AXP20X_FUNCTION(0x0, "gpio_out"), + AXP20X_FUNCTION(0x2, "gpio_in"), + AXP20X_FUNCTION(0x3, "ldo")), +}; + static const struct axp20x_pinctrl_desc axp20x_pinctrl_data = { .pins = axp209_pins, .npins = ARRAY_SIZE(axp209_pins), }; +static const struct axp20x_pinctrl_desc axp813_pinctrl_data = { + .pins = axp813_pins, + .npins = ARRAY_SIZE(axp813_pins), +}; + static int axp20x_gpio_input(struct gpio_chip *chip, unsigned offset) { return pinctrl_gpio_direction_input(chip->base + offset); @@ -479,6 +496,7 @@ static int axp20x_pctl_probe(struct platform_device *pdev) struct axp20x_pctl *pctl; struct pinctrl_desc *pctrl_desc; struct pinctrl_pin_desc *pins; + struct device_node *np = pdev->dev.of_node; int ret, i; if (!of_device_is_available(pdev->dev.of_node)) @@ -505,13 +523,18 @@ static int axp20x_pctl_probe(struct platform_device *pdev) pctl->chip.set = axp20x_gpio_set; pctl->chip.direction_input = axp20x_gpio_input; pctl->chip.direction_output = axp20x_gpio_output; - pctl->chip.ngpio = 3; pctl->regmap = axp20x->regmap; - pctl->desc = &axp20x_pinctrl_data; - pctl->gpio_status_offset = 4; + if (of_device_is_compatible(np, "x-powers,axp209-gpio")) { + pctl->desc = &axp20x_pinctrl_data; + pctl->gpio_status_offset = 4; + } else { + pctl->desc = &axp813_pinctrl_data; + pctl->gpio_status_offset = 0; + } pctl->dev = &pdev->dev; + pctl->chip.ngpio = pctl->desc->npins; platform_set_drvdata(pdev, pctl); @@ -566,6 +589,7 @@ static int axp20x_pctl_probe(struct platform_device *pdev) static const struct of_device_id axp20x_pctl_match[] = { { .compatible = "x-powers,axp209-gpio" }, + { .compatible = "x-powers,axp813-pctl" }, { } }; MODULE_DEVICE_TABLE(of, axp20x_pctl_match);