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[84.217.193.77]) by mx.google.com with ESMTPSA id f7sm7395787lam.26.2014.12.04.09.20.07 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 04 Dec 2014 09:20:07 -0800 (PST) From: Ola Liljedahl To: lng-odp@lists.linaro.org Date: Thu, 4 Dec 2014 18:20:06 +0100 Message-Id: <1417713606-7920-1-git-send-email-ola.liljedahl@linaro.org> X-Mailer: git-send-email 1.9.1 X-Topics: patch Subject: [lng-odp] [PATCHv2] linux-generic: odp_ticketlock.c: performance regression, added comments X-BeenThere: lng-odp@lists.linaro.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Errors-To: lng-odp-bounces@lists.linaro.org Sender: lng-odp-bounces@lists.linaro.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: ola.liljedahl@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.170 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 Signed-off-by: Ola Liljedahl Reviewed-by: Bill Fischofer --- When releasing a ticket lock, replace the atomic increment operation with load-relaxed and store-release as this avaoids an (unnecessary) atomic RMW operation which is expensive on some architectures. Add descriptive comments for all ticketlock operations. platform/linux-generic/odp_ticketlock.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/platform/linux-generic/odp_ticketlock.c b/platform/linux-generic/odp_ticketlock.c index 6c5e74e..682b01b 100644 --- a/platform/linux-generic/odp_ticketlock.c +++ b/platform/linux-generic/odp_ticketlock.c @@ -22,8 +22,13 @@ void odp_ticketlock_lock(odp_ticketlock_t *ticketlock) { uint32_t ticket; + /* Take a ticket using an atomic increment of 'next_ticket'. + * This can be a relaxed operation but it cannot have the + * acquire semantics since we haven't acquired the lock yet */ ticket = odp_atomic_fetch_inc_u32(&ticketlock->next_ticket); + /* Spin waiting for our turn. Use load-acquire so that we acquire + * all stores from the previous lock owner */ while (ticket != _odp_atomic_u32_load_mm(&ticketlock->cur_ticket, _ODP_MEMMODEL_ACQ)) odp_spin(); @@ -32,7 +37,15 @@ void odp_ticketlock_lock(odp_ticketlock_t *ticketlock) void odp_ticketlock_unlock(odp_ticketlock_t *ticketlock) { - _odp_atomic_u32_add_mm(&ticketlock->cur_ticket, 1, _ODP_MEMMODEL_RLS); + /* Release the lock by incrementing 'cur_ticket'. As we are the + * lock owner and thus the only thread that is allowed to write + * 'cur_ticket', we don't need to do this with an (expensive) + * atomic RMW operation. Instead load-relaxed the current value + * and a store-release of the incremented value */ + uint32_t cur = _odp_atomic_u32_load_mm(&ticketlock->cur_ticket, + _ODP_MEMMODEL_RLX); + _odp_atomic_u32_store_mm(&ticketlock->cur_ticket, cur + 1, + _ODP_MEMMODEL_RLS); #if defined __OCTEON__ odp_sync_stores(); /* SYNCW to flush write buffer */ @@ -42,6 +55,11 @@ void odp_ticketlock_unlock(odp_ticketlock_t *ticketlock) int odp_ticketlock_is_locked(odp_ticketlock_t *ticketlock) { + /* Compare 'cur_ticket' with 'next_ticket'. Ideally we should read + * both variables atomically but the information can become stale + * immediately anyway so the function can only be used reliably in + * a quiescent system where non-atomic loads should not pose a + * problem */ return odp_atomic_load_u32(&ticketlock->cur_ticket) != odp_atomic_load_u32(&ticketlock->next_ticket); }