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Show patches with
: Submitter =
wanghongzhe
| Archived =
No
| 6 patches
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andy.doan@linaro.org
andy.doan@linaro.org
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S/W/F
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State
[RESEND,v3] seccomp: Improve performance by optimizing rmb()
[RESEND,v3] seccomp: Improve performance by optimizing rmb()
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2021-03-09
wanghongzhe
New
[v3] seccomp: Improve performace by optimizing rmb()
[v3] seccomp: Improve performace by optimizing rmb()
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2021-02-24
wanghongzhe
Superseded
[v3] seccomp: Improve performace by optimizing rmb()
[v3] seccomp: Improve performace by optimizing rmb()
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2021-02-24
wanghongzhe
Superseded
[v2] seccomp: Improve performace by optimizing rmb()
[v2] seccomp: Improve performace by optimizing rmb()
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2021-02-05
wanghongzhe
New
[v1,1/1] Firstly, as Andy mentioned, this should be smp_rmb() instead of rmb(). considering that TSYNC is a cross-thread situation, and rmb() is a mandatory barrier which should not be used to control SMP effects, since mandatory barriers impose unnecessa
[v1,1/1] Firstly, as Andy mentioned, this should be smp_rmb() instead of rmb(). considering that ...
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2021-02-02
wanghongzhe
New
seccomp: Improve performance by optimizing memory barrier
seccomp: Improve performance by optimizing memory barrier
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2021-02-01
wanghongzhe
New