From patchwork Mon May 4 08:25:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Ooi, Joyce" X-Patchwork-Id: 219988 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 97B2EC3A5A9 for ; Mon, 4 May 2020 08:29:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7284A21582 for ; Mon, 4 May 2020 08:29:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728370AbgEDI3R (ORCPT ); Mon, 4 May 2020 04:29:17 -0400 Received: from mga06.intel.com ([134.134.136.31]:46019 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728354AbgEDI3Q (ORCPT ); Mon, 4 May 2020 04:29:16 -0400 IronPort-SDR: RdV91FaB0/RgDTHNiqz0AAX7G71rWV9QHpA8CQ6xyrUG7+15yVQDXxYj3hQ30A0tggU5iiwP3p RDHuNFPDHU9g== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 May 2020 01:29:15 -0700 IronPort-SDR: dbfHMXKA49/zFv6/sWpDJdQCXUw03pAVMvltBQWfAYxQ6jOqukhPxd4oFYA5HzLweYSdgxRnPz hjvqGZy37IKg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.73,351,1583222400"; d="scan'208";a="295436191" Received: from pg-nxl3.altera.com ([10.142.129.93]) by orsmga008.jf.intel.com with ESMTP; 04 May 2020 01:29:12 -0700 From: Joyce Ooi To: Thor Thayer , "David S . Miller" Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Dalon Westergreen , Joyce Ooi , Tan Ley Foon , See Chin Liang , Dinh Nguyen , Rob Herring , devicetree@vger.kernel.org Subject: [PATCHv2 10/10] net: eth: altera: update devicetree bindings documentation Date: Mon, 4 May 2020 16:25:58 +0800 Message-Id: <20200504082558.112627-11-joyce.ooi@intel.com> X-Mailer: git-send-email 2.13.0 In-Reply-To: <20200504082558.112627-1-joyce.ooi@intel.com> References: <20200504082558.112627-1-joyce.ooi@intel.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: Dalon Westergreen Update devicetree bindings documentation to include msgdma prefetcher and ptp bindings. Cc: Rob Herring Cc: devicetree@vger.kernel.org Signed-off-by: Dalon Westergreen Signed-off-by: Joyce Ooi --- v2: no change --- .../devicetree/bindings/net/altera_tse.txt | 103 +++++++++++++++++---- 1 file changed, 84 insertions(+), 19 deletions(-) diff --git a/Documentation/devicetree/bindings/net/altera_tse.txt b/Documentation/devicetree/bindings/net/altera_tse.txt index 0b7d4d3758ea..2f2d12603907 100644 --- a/Documentation/devicetree/bindings/net/altera_tse.txt +++ b/Documentation/devicetree/bindings/net/altera_tse.txt @@ -2,53 +2,86 @@ Required properties: - compatible: Should be "altr,tse-1.0" for legacy SGDMA based TSE, and should - be "altr,tse-msgdma-1.0" for the preferred MSGDMA based TSE. + be "altr,tse-msgdma-1.0" for the preferred MSGDMA based TSE, + and "altr,tse-msgdma-2.0" for MSGDMA with prefetcher based + implementations. ALTR is supported for legacy device trees, but is deprecated. altr should be used for all new designs. - reg: Address and length of the register set for the device. It contains the information of registers in the same order as described by reg-names - reg-names: Should contain the reg names - "control_port": MAC configuration space region - "tx_csr": xDMA Tx dispatcher control and status space region - "tx_desc": MSGDMA Tx dispatcher descriptor space region - "rx_csr" : xDMA Rx dispatcher control and status space region - "rx_desc": MSGDMA Rx dispatcher descriptor space region - "rx_resp": MSGDMA Rx dispatcher response space region - "s1": SGDMA descriptor memory - interrupts: Should contain the TSE interrupts and it's mode. - interrupt-names: Should contain the interrupt names - "rx_irq": xDMA Rx dispatcher interrupt - "tx_irq": xDMA Tx dispatcher interrupt + "rx_irq": DMA Rx dispatcher interrupt + "tx_irq": DMA Tx dispatcher interrupt - rx-fifo-depth: MAC receive FIFO buffer depth in bytes - tx-fifo-depth: MAC transmit FIFO buffer depth in bytes - phy-mode: See ethernet.txt in the same directory. - phy-handle: See ethernet.txt in the same directory. - phy-addr: See ethernet.txt in the same directory. A configuration should include phy-handle or phy-addr. -- altr,has-supplementary-unicast: - If present, TSE supports additional unicast addresses. - Otherwise additional unicast addresses are not supported. -- altr,has-hash-multicast-filter: - If present, TSE supports a hash based multicast filter. - Otherwise, hash-based multicast filtering is not supported. - - mdio device tree subnode: When the TSE has a phy connected to its local mdio, there must be device tree subnode with the following required properties: - - compatible: Must be "altr,tse-mdio". - #address-cells: Must be <1>. - #size-cells: Must be <0>. For each phy on the mdio bus, there must be a node with the following fields: - - reg: phy id used to communicate to phy. - device_type: Must be "ethernet-phy". The MAC address will be determined using the optional properties defined in ethernet.txt. +- altr,has-supplementary-unicast: + If present, TSE supports additional unicast addresses. + Otherwise additional unicast addresses are not supported. +- altr,has-hash-multicast-filter: + If present, TSE supports a hash based multicast filter. + Otherwise, hash-based multicast filtering is not supported. +- altr,has-ptp: + If present, TSE supports 1588 timestamping. Currently only + supported with the msgdma prefetcher. +- altr,tx-poll-cnt: + Optional cycle count for Tx prefetcher to poll descriptor + list. If not present, defaults to 128, which at 125MHz is + roughly 1usec. Only for "altr,tse-msgdma-2.0". +- altr,rx-poll-cnt: + Optional cycle count for Tx prefetcher to poll descriptor + list. If not present, defaults to 128, which at 125MHz is + roughly 1usec. Only for "altr,tse-msgdma-2.0". + +Required registers by compatibility string: + - "altr,tse-1.0" + "control_port": MAC configuration space region + "tx_csr": DMA Tx dispatcher control and status space region + "rx_csr" : DMA Rx dispatcher control and status space region + "s1": DMA descriptor memory + + - "altr,tse-msgdma-1.0" + "control_port": MAC configuration space region + "tx_csr": DMA Tx dispatcher control and status space region + "tx_desc": DMA Tx dispatcher descriptor space region + "rx_csr" : DMA Rx dispatcher control and status space region + "rx_desc": DMA Rx dispatcher descriptor space region + "rx_resp": DMA Rx dispatcher response space region + + - "altr,tse-msgdma-2.0" + "control_port": MAC configuration space region + "tx_csr": DMA Tx dispatcher control and status space region + "tx_pref": DMA Tx prefetcher configuration space region + "rx_csr" : DMA Rx dispatcher control and status space region + "rx_pref": DMA Rx prefetcher configuration space region + "tod_ctrl": Time of Day Control register only required when + timestamping support is enabled. Timestamping is + only supported with the msgdma-2.0 implementation. + +Optional properties: +- local-mac-address: See ethernet.txt in the same directory. +- max-frame-size: See ethernet.txt in the same directory. + Example: tse_sub_0_eth_tse_0: ethernet@1,00000000 { @@ -86,6 +119,11 @@ Example: device_type = "ethernet-phy"; }; + phy2: ethernet-phy@2 { + reg = <0x2>; + device_type = "ethernet-phy"; + }; + }; }; @@ -111,3 +149,30 @@ Example: altr,has-hash-multicast-filter; phy-handle = <&phy1>; }; + + + tse_sub_2_eth_tse_0: ethernet@1,00002000 { + compatible = "altr,tse-msgdma-2.0"; + reg = <0x00000001 0x00002000 0x00000400>, + <0x00000001 0x00002400 0x00000020>, + <0x00000001 0x00002420 0x00000020>, + <0x00000001 0x00002440 0x00000020>, + <0x00000001 0x00002460 0x00000020>, + <0x00000001 0x00002480 0x00000040>; + reg-names = "control_port", "rx_csr", "rx_pref","tx_csr", "tx_pref", "tod_ctrl"; + interrupt-parent = <&hps_0_arm_gic_0>; + interrupts = <0 45 4>, <0 44 4>; + interrupt-names = "rx_irq", "tx_irq"; + rx-fifo-depth = <2048>; + tx-fifo-depth = <2048>; + address-bits = <48>; + max-frame-size = <1500>; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-mode = "sgmii"; + altr,has-supplementary-unicast; + altr,has-hash-multicast-filter; + altr,has-ptp; + altr,tx-poll-cnt = <128>; + altr,rx-poll-cnt = <32>; + phy-handle = <&phy2>; + };