From patchwork Wed Dec 2 04:53:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinicius Costa Gomes X-Patchwork-Id: 336592 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6A3A7C64E8A for ; Wed, 2 Dec 2020 04:55:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 19BE922203 for ; Wed, 2 Dec 2020 04:55:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387465AbgLBEzQ (ORCPT ); Tue, 1 Dec 2020 23:55:16 -0500 Received: from mga04.intel.com ([192.55.52.120]:43298 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726151AbgLBEzQ (ORCPT ); Tue, 1 Dec 2020 23:55:16 -0500 IronPort-SDR: /qyPLDVN5XrzI3dnOw9+8F5/cUmkEDsuolrncgqNCzHe0K/yJAaH+2SSr7gGbNSjaHglwpkBsL RcY3EdKOQEkQ== X-IronPort-AV: E=McAfee;i="6000,8403,9822"; a="170387536" X-IronPort-AV: E=Sophos;i="5.78,385,1599548400"; d="scan'208";a="170387536" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Dec 2020 20:53:49 -0800 IronPort-SDR: 0WbdXq5qnllbYBprKbbbPey2UHrxjaAE7yMXBQUiaflxM3hn7eD+J1UC0eGx4nVTWsDShXx+J4 SkeOf2hI5ROQ== X-IronPort-AV: E=Sophos;i="5.78,385,1599548400"; d="scan'208";a="549888378" Received: from shivanif-mobl.amr.corp.intel.com (HELO localhost.localdomain) ([10.212.152.222]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Dec 2020 20:53:49 -0800 From: Vinicius Costa Gomes To: netdev@vger.kernel.org Cc: Vinicius Costa Gomes , jhs@mojatatu.com, xiyou.wangcong@gmail.com, jiri@resnulli.us, kuba@kernel.org, m-karicheri2@ti.com, vladimir.oltean@nxp.com, Jose.Abreu@synopsys.com, po.liu@nxp.com, intel-wired-lan@lists.osuosl.org, anthony.l.nguyen@intel.com Subject: [PATCH net-next v1 5/9] igc: Avoid TX Hangs because long cycles Date: Tue, 1 Dec 2020 20:53:21 -0800 Message-Id: <20201202045325.3254757-6-vinicius.gomes@intel.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201202045325.3254757-1-vinicius.gomes@intel.com> References: <20201202045325.3254757-1-vinicius.gomes@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Avoid possible TX Hangs caused by using long Qbv cycles. In some cases, using long cycles (more than 1 second) can cause transmissions to be blocked for that time. As the TX Hang timeout is close to 1 second, we may need to reduce the cycle time to something more reasonable: the value chosen is 1ms. Signed-off-by: Vinicius Costa Gomes --- drivers/net/ethernet/intel/igc/igc_main.c | 4 ++-- drivers/net/ethernet/intel/igc/igc_tsn.c | 6 +++--- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/intel/igc/igc_main.c b/drivers/net/ethernet/intel/igc/igc_main.c index b673ac1199bb..3af54fd9cc0d 100644 --- a/drivers/net/ethernet/intel/igc/igc_main.c +++ b/drivers/net/ethernet/intel/igc/igc_main.c @@ -4692,12 +4692,12 @@ static int igc_save_launchtime_params(struct igc_adapter *adapter, int queue, if (adapter->base_time) return 0; - adapter->cycle_time = NSEC_PER_SEC; + adapter->cycle_time = NSEC_PER_MSEC; for (i = 0; i < adapter->num_tx_queues; i++) { ring = adapter->tx_ring[i]; ring->start_time = 0; - ring->end_time = NSEC_PER_SEC; + ring->end_time = NSEC_PER_MSEC; } return 0; diff --git a/drivers/net/ethernet/intel/igc/igc_tsn.c b/drivers/net/ethernet/intel/igc/igc_tsn.c index 38451cf05ac6..f5a5527adb21 100644 --- a/drivers/net/ethernet/intel/igc/igc_tsn.c +++ b/drivers/net/ethernet/intel/igc/igc_tsn.c @@ -54,11 +54,11 @@ static int igc_tsn_disable_offload(struct igc_adapter *adapter) wr32(IGC_TXQCTL(i), 0); wr32(IGC_STQT(i), 0); - wr32(IGC_ENDQT(i), NSEC_PER_SEC); + wr32(IGC_ENDQT(i), NSEC_PER_MSEC); } - wr32(IGC_QBVCYCLET_S, NSEC_PER_SEC); - wr32(IGC_QBVCYCLET, NSEC_PER_SEC); + wr32(IGC_QBVCYCLET_S, NSEC_PER_MSEC); + wr32(IGC_QBVCYCLET, NSEC_PER_MSEC); adapter->flags &= ~IGC_FLAG_TSN_QBV_ENABLED;