From patchwork Mon Feb 15 15:24:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nobuhiro Iwamatsu X-Patchwork-Id: 383166 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 28152C433DB for ; Mon, 15 Feb 2021 15:29:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E691664EA1 for ; Mon, 15 Feb 2021 15:29:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231131AbhBOP3W (ORCPT ); Mon, 15 Feb 2021 10:29:22 -0500 Received: from mo-csw1516.securemx.jp ([210.130.202.155]:60216 "EHLO mo-csw.securemx.jp" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230477AbhBOP12 (ORCPT ); Mon, 15 Feb 2021 10:27:28 -0500 Received: by mo-csw.securemx.jp (mx-mo-csw1516) id 11FFOj9D022780; Tue, 16 Feb 2021 00:24:45 +0900 X-Iguazu-Qid: 34tMYNXf5ebGnGh0Oh X-Iguazu-QSIG: v=2; s=0; t=1613402684; q=34tMYNXf5ebGnGh0Oh; m=rBDnX/PJN+1ndkY6stkN0v0zjSickY0OqkdQLrtRHUo= Received: from imx12.toshiba.co.jp (imx12.toshiba.co.jp [61.202.160.132]) by relay.securemx.jp (mx-mr1511) id 11FFOhpH002980; Tue, 16 Feb 2021 00:24:44 +0900 Received: from enc02.toshiba.co.jp ([61.202.160.51]) by imx12.toshiba.co.jp with ESMTP id 11FFOhpg020782; Tue, 16 Feb 2021 00:24:43 +0900 (JST) Received: from hop101.toshiba.co.jp ([133.199.85.107]) by enc02.toshiba.co.jp with ESMTP id 11FFOg0r008532; Tue, 16 Feb 2021 00:24:42 +0900 From: Nobuhiro Iwamatsu To: "David S . Miller" , Jakub Kicinski , Rob Herring Cc: Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , leon@kernel.org, arnd@kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, punit1.agrawal@toshiba.co.jp, yuji2.ishikawa@toshiba.co.jp, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Nobuhiro Iwamatsu Subject: [PATCH v4 4/4] arm: dts: visconti: Add DT support for Toshiba Visconti5 ethernet controller Date: Tue, 16 Feb 2021 00:24:38 +0900 X-TSB-HOP: ON Message-Id: <20210215152438.4318-5-nobuhiro1.iwamatsu@toshiba.co.jp> X-Mailer: git-send-email 2.30.0.rc2 In-Reply-To: <20210215152438.4318-1-nobuhiro1.iwamatsu@toshiba.co.jp> References: <20210215152438.4318-1-nobuhiro1.iwamatsu@toshiba.co.jp> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Add the ethernet controller node in Toshiba Visconti5 SoC-specific DT file. And enable this node in TMPV7708 RM main board's board-specific DT file. Signed-off-by: Nobuhiro Iwamatsu Reported-by: Naresh Kamboju --- .../boot/dts/toshiba/tmpv7708-rm-mbrc.dts | 18 +++++++++++++ arch/arm64/boot/dts/toshiba/tmpv7708.dtsi | 25 +++++++++++++++++++ 2 files changed, 43 insertions(+) diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts b/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts index ed0bf7f13f54..48fa8776e36f 100644 --- a/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts +++ b/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts @@ -41,3 +41,21 @@ &uart1 { clocks = <&uart_clk>; clock-names = "apb_pclk"; }; + +&piether { + status = "okay"; + phy-handle = <&phy0>; + phy-mode = "rgmii-id"; + clocks = <&clk300mhz>, <&clk125mhz>; + clock-names = "stmmaceth", "phy_ref_clk"; + + mdio0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + phy0: ethernet-phy@1 { + device_type = "ethernet-phy"; + reg = <0x1>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi index 242f25f4e12a..3366786699fc 100644 --- a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi +++ b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi @@ -134,6 +134,20 @@ uart_clk: uart-clk { #clock-cells = <0>; }; + clk125mhz: clk125mhz { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + #clock-cells = <0>; + clock-output-names = "clk125mhz"; + }; + + clk300mhz: clk300mhz { + compatible = "fixed-clock"; + clock-frequency = <300000000>; + #clock-cells = <0>; + clock-output-names = "clk300mhz"; + }; + soc { #address-cells = <2>; #size-cells = <2>; @@ -384,6 +398,17 @@ spi6: spi@28146000 { #size-cells = <0>; status = "disabled"; }; + + piether: ethernet@28000000 { + compatible = "toshiba,visconti-dwmac", "snps,dwmac-4.20a"; + reg = <0 0x28000000 0 0x10000>; + interrupts = ; + interrupt-names = "macirq"; + snps,txpbl = <4>; + snps,rxpbl = <4>; + snps,tso; + status = "disabled"; + }; }; };