From patchwork Mon Mar 15 11:29:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 402418 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8B0FAC4321A for ; Mon, 15 Mar 2021 11:30:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5325E64E20 for ; Mon, 15 Mar 2021 11:30:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230255AbhCOL3z (ORCPT ); Mon, 15 Mar 2021 07:29:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40386 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229880AbhCOL3Y (ORCPT ); Mon, 15 Mar 2021 07:29:24 -0400 Received: from mail-ej1-x629.google.com (mail-ej1-x629.google.com [IPv6:2a00:1450:4864:20::629]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1C891C061574; Mon, 15 Mar 2021 04:29:24 -0700 (PDT) Received: by mail-ej1-x629.google.com with SMTP id lr13so65584791ejb.8; Mon, 15 Mar 2021 04:29:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=KFNekFiUvI41Ro84pNXiS2rRQL/pZm+3ROgVX6AukC8=; b=dJ7H/BMpMSWcK/p/UyoE8deduBfnpDR3m8JCfUz+CaxKdP+hN0SLVriYHZZ5AuXQoo VtRAAzJ93gCTYRABHq3ZQ25NR7gMHkJkCxr+A4Wz2BDV/7CACIJI+FxjiV8nmTWlOb3p 7iACsW7/KTnbVFGGLZxA9oEG/+ZHVZWSVoFPzKJjJDWHHUlH7ETnYNiOQ9dsBCYFZSZn F62xMx4KT3NwLdDd9x7jV4OnIIWbADTTBCi8+khwac4pKJfkdCtMl1h1NYm/OmQAZ+Xu SgNp3RcieqikT4ZCv41rXNhGqvNucxtwZ1acssaiG39vxkKb+UXGl6ntsOCVjmpBcD9q XEpA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=KFNekFiUvI41Ro84pNXiS2rRQL/pZm+3ROgVX6AukC8=; b=P8vrw0AKrV3669gaBshIPqUrUcK9GjqYDy4MuR1W+/jtX1SURmcVe4O+TS7SH0oGEi tGHAmOqLONKKuF+2MBB0NzfzbDq/LyCpAFKzaurkEJvg4G4Pnszypl4Ylw/lfFBWCQ3E j5+Cq0+GF1yffAPpKuKuR0THGAupLPvVKRFMdqdffGU6Eb3dPxvd7si8ZAkWgzLEmCU8 uCkoWZWVomMXscBeNu5xRJmui+c+3QU7aEhoKg9hVQwjiBFGNSAR8nkVnTGOR5sfyjPG b2TpUbCAQ7f1tXohhC5lHBo9cqRysGuK5lSlomKa9CPALllpc3NYbmC6JJR8witbiMs/ Ic5w== X-Gm-Message-State: AOAM530JuVPkSjENc5AYREaHvY11aHYqVJa4OggEFo1qopEE+dU1bHnP O28HcFnZA5OJcFDp2Ho+O3Y+bBPqUZo= X-Google-Smtp-Source: ABdhPJxgQF7PMbHxn1LGbKho6Q/fyHhmovD08KaijO6PYUXyzjQpYbWskg+hRpWcr92Rh6qH9m1XWg== X-Received: by 2002:a17:906:154f:: with SMTP id c15mr22020763ejd.142.1615807762880; Mon, 15 Mar 2021 04:29:22 -0700 (PDT) Received: from localhost.localdomain ([188.24.140.160]) by smtp.gmail.com with ESMTPSA id q25sm3921423edt.51.2021.03.15.04.29.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Mar 2021 04:29:22 -0700 (PDT) From: Cristian Ciocaltea To: "David S. Miller" , Andrew Lunn , Jakub Kicinski , Rob Herring , =?utf-8?q?Andreas_F=C3=A4rber?= , Manivannan Sadhasivam , Philipp Zabel Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-actions@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/3] dt-bindings: net: Add Actions Semi Owl Ethernet MAC binding Date: Mon, 15 Mar 2021 13:29:16 +0200 Message-Id: <731f89c3c1ac90b2b24fa2140e07e97aa516f79f.1615807292.git.cristian.ciocaltea@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Add devicetree binding for the Ethernet MAC present on the Actions Semi Owl family of SoCs. For the moment advertise only the support for the Actions Semi S500 SoC variant. Signed-off-by: Cristian Ciocaltea --- .../bindings/net/actions,owl-emac.yaml | 92 +++++++++++++++++++ 1 file changed, 92 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/actions,owl-emac.yaml diff --git a/Documentation/devicetree/bindings/net/actions,owl-emac.yaml b/Documentation/devicetree/bindings/net/actions,owl-emac.yaml new file mode 100644 index 000000000000..1626e0a821b0 --- /dev/null +++ b/Documentation/devicetree/bindings/net/actions,owl-emac.yaml @@ -0,0 +1,92 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/actions,owl-emac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Actions Semi Owl SoCs Ethernet MAC Controller + +maintainers: + - Cristian Ciocaltea + +description: | + This Ethernet MAC is used on the Owl family of SoCs from Actions Semi. + It provides the RMII and SMII interfaces and is compliant with the + IEEE 802.3 CSMA/CD standard, supporting both half-duplex and full-duplex + operation modes at 10/100 Mb/s data transfer rates. + +allOf: + - $ref: "ethernet-controller.yaml#" + +properties: + compatible: + oneOf: + - const: actions,owl-emac + - items: + - enum: + - actions,s500-emac + - const: actions,owl-emac + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + minItems: 2 + maxItems: 2 + + clock-names: + additionalItems: false + items: + - const: eth + - const: rmii + + resets: + maxItems: 1 + + actions,ethcfg: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the device containing custom config. + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - resets + - phy-mode + - phy-handle + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + + ethernet@b0310000 { + compatible = "actions,s500-emac", "actions,owl-emac"; + reg = <0xb0310000 0x10000>; + interrupts = ; + clocks = <&cmu 59 /*CLK_ETHERNET*/>, <&cmu CLK_RMII_REF>; + clock-names = "eth", "rmii"; + resets = <&cmu RESET_ETHERNET>; + phy-mode = "rmii"; + phy-handle = <ð_phy>; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + eth_phy: ethernet-phy@3 { + reg = <0x3>; + interrupt-parent = <&sirq>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + }; + }; + };