From patchwork Tue Jun 5 15:22:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 137758 Delivered-To: patch@linaro.org Received: by 2002:a2e:970d:0:0:0:0:0 with SMTP id r13-v6csp1098863lji; Tue, 5 Jun 2018 08:26:01 -0700 (PDT) X-Google-Smtp-Source: ADUXVKJfe6JtP1q2IIUyMJ3yRpO4x/wvAPDQiU1mLvB5+6lCD5+mV8mTa2+89LovnUl2CKFQ97uM X-Received: by 2002:a24:f444:: with SMTP id u4-v6mr6023240iti.132.1528212361613; Tue, 05 Jun 2018 08:26:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1528212361; cv=none; d=google.com; s=arc-20160816; b=a7Jh0PPqQm5DmeZqrH62J5yVLTJ6oMwWeM3OxZlf4xonSIDpaNPnKFI18zYHkNsjfV DlqJNxEFwgSYZlVTSMI0owI9Qu8EXFRzYw0X/5u5vB7vpnlx6wmER2X0QF0yWXX4VNoE pVzu8r9MDy8xZ7vVLL4K7Cr0dzQ0kArAk9/69dEL4K8tVk/z3+w/fv5G0s0W1nghyIqp CwSifdVvT/N8wc6sIUsu/caaLyp5QlDCIaH2FCGvpo0H5FN71SoAcMJumM6JcM+J3Is8 szmsymUc7X8eYm3LtG+Q5CBhPdGizOdm9NYjCENmmVJpCHf57c7VbOP6RLL9PLspNkyM /rBA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:message-id:date:to:from :arc-authentication-results; bh=Fa4x/KDu80IyKQJH6licQWu4Uq/2+/5POzqo799c4r0=; b=h3sM/oFrFLc1mkpYhyOfPQeNqd7KPKFPaweGk3QRCIYkeQ7mWcX1ck/kyxlTf1Cwk+ FhV70kPmHYn/o7rXWBnQ4BpPMM384kK/oh4xkYF88oM0dh7SW24PuigpXrMhHTDDNhfE yfkaWAsmvCh9mR77/d0tW4L2vmuxJPgfZEA92uxyoEwUFxshuBc/DyjcGWdDo+idKzYL KM9y7WlHKO6wzw0Q5SijSAP5tMytouKQf9s3sMIDTXuVro+2Fei2pnyWE3O58WYO+Qad NO0QpvRX6ArVwAEFPsOwXfA+OqFmi10+Elts6372+oFqakQEExr8FsMlPAOTrCxTo6pi W1Lg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id d72-v6si9574088ioe.78.2018.06.05.08.26.01 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 05 Jun 2018 08:26:01 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1fQDnu-0005Ae-1H; Tue, 05 Jun 2018 15:23:22 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1fQDns-0005AP-Pt for xen-devel@lists.xenproject.org; Tue, 05 Jun 2018 15:23:20 +0000 X-Inumbo-ID: 0fd6a316-68d4-11e8-9728-bc764e045a96 Received: from foss.arm.com (unknown [217.140.101.70]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id 0fd6a316-68d4-11e8-9728-bc764e045a96; Tue, 05 Jun 2018 17:21:04 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1B24C1596; Tue, 5 Jun 2018 08:23:18 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.206.53]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 308693F557; Tue, 5 Jun 2018 08:23:17 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Tue, 5 Jun 2018 16:22:50 +0100 Message-Id: <20180605152303.14450-1-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 Subject: [Xen-devel] [PATCH v1 00/13] xen/arm: SSBD (aka Spectre-v4) mitigation (XSA-263) X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: andre.przywara@arm.com, Julien Grall , sstabellini@kernel.org MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" Hi all, This patch series implement the Xen hypervisor side of the "Spectre-v4" (CVE-2018-3639) mitigation known as "Speculative Store Bypass Disable" (SSBD). More information can be found at: https://bugs.chromium.org/p/project-zero/issues/detail?id=1528 https://developer.arm.com/support/arm-security-updates/speculative-processor-vulnerability For all released Arm Cortex-A that are affected by this issue, then the preferred mitigation is simply to set a chicken bit in the firmware during CPU initialization and therefore no change to Xen is required. Other CPUs may require the chicken bit to be toggled dynamically (for example, when switching between kernel-mode and hypervisor-mode) and this is achieve by calling into EL3 via an SMC which has been published as part of the latest SMCCC specification: https://developer.arm.com/cache-speculation-vulnerability-firmware-specification as well as an ATF update for the released ARM cores affected by SSBD: https://github.com/ARM-software/arm-trusted-firmware/pull/1392 These patches provide the following: 1. Safe probing of firmware to establish which CPUs in the system require calling into EL3 as part of the mitigation 2. A command-line option to force SSBD mitigation to be always on, always off, or dynamically toggled (default) for CPUs that require the EL3 call. 3. An initial implementation of the call via Xen, which exposes the mitigation to the guest via an HVC interface. This patch also provides bug fix and new infrastructure require to implement the mitigation: 1. Zeroed each vCPU stack 2. Provide generic assembly macros 3. Provide alternative callback (RFC) A branch can be found with all the patches at: https://xenbits.xen.org/git-http/people/julieng/xen-unstable.git branch ssbd/v2 Cheers, Julien Grall (13): xen/arm: domain: Zero the per-vCPU cpu_info xen/arm64: entry: Use named label in guest_sync xen/arm: setup: Check errata for boot CPU later on xen/arm: Add ARCH_WORKAROUND_2 probing xen/arm: Add command line option to control SSBD mitigation xen/arm: Add ARCH_WORKAROUND_2 support for guests xen/arm: Simplify alternative patching of non-writable region xen/arm: alternatives: Add dynamic patching feature xen/arm64: Add generic assembly macros xen/arm64: Implement a fast path for handling SMCCC_ARCH_WORKAROUND_2 xen/arm: Kconfig: Move HARDEN_BRANCH_PREDICTOR under "Architecture features" xen/arm: smccc: Fix indentation in ARM_SMCCC_ARCH_WORKAROUND_1_FID xen/arm: Avoid to use current everywhere in enter_hypervisor_head docs/misc/xen-command-line.markdown | 18 +++++ xen/arch/arm/Kconfig | 44 +++++++---- xen/arch/arm/alternative.c | 86 +++++++++++---------- xen/arch/arm/arm64/asm-offsets.c | 2 + xen/arch/arm/arm64/entry.S | 48 +++++++++++- xen/arch/arm/cpuerrata.c | 150 ++++++++++++++++++++++++++++++++++++ xen/arch/arm/domain.c | 9 +++ xen/arch/arm/setup.c | 8 +- xen/arch/arm/traps.c | 32 ++++++-- xen/arch/arm/vsmc.c | 37 +++++++++ xen/include/asm-arm/alternative.h | 44 +++++++++-- xen/include/asm-arm/arm64/macros.h | 25 ++++++ xen/include/asm-arm/cpuerrata.h | 42 ++++++++++ xen/include/asm-arm/cpufeature.h | 3 +- xen/include/asm-arm/current.h | 6 +- xen/include/asm-arm/macros.h | 2 +- xen/include/asm-arm/smccc.h | 13 +++- 17 files changed, 491 insertions(+), 78 deletions(-) create mode 100644 xen/include/asm-arm/arm64/macros.h