From patchwork Thu Jul 28 14:51:25 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 72977 Delivered-To: patch@linaro.org Received: by 10.140.29.52 with SMTP id a49csp894682qga; Thu, 28 Jul 2016 07:54:27 -0700 (PDT) X-Received: by 10.36.43.74 with SMTP id h71mr23685001ita.60.1469717665489; Thu, 28 Jul 2016 07:54:25 -0700 (PDT) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id x184si18834342itd.93.2016.07.28.07.54.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 28 Jul 2016 07:54:25 -0700 (PDT) Received-SPF: neutral (google.com: 192.237.175.120 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=neutral (google.com: 192.237.175.120 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) smtp.mailfrom=xen-devel-bounces@lists.xen.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1bSmfG-0002nO-Du; Thu, 28 Jul 2016 14:51:58 +0000 Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1bSmfF-0002mM-AZ for xen-devel@lists.xen.org; Thu, 28 Jul 2016 14:51:57 +0000 Received: from [85.158.139.211] by server-10.bemta-5.messagelabs.com id D0/AC-19922-C0C1A975; Thu, 28 Jul 2016 14:51:56 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrGLMWRWlGSWpSXmKPExsVysyfVTZdHZla 4wa793BZLPi5mcWD0OLr7N1MAYxRrZl5SfkUCa0b/2l8sBf+dKs5/F21gfKnbxcjFISSwiVFi zd/PbBDOaUaJvxPOATmcHGwCmhJ3Pn9iArFFBKQlrn2+zAhSxCzQziixtr+XGSQhLBApcfPKR zCbRUBV4vPU76wgNq+As8TcozPAmiUE5CROHpsMFOfg4BRwkXjdLQQSFgIqmT5zKeMERu4FjA yrGDWKU4vKUot0jcz1kooy0zNKchMzc3QNDUz1clOLixPTU3MSk4r1kvNzNzEC/VvPwMC4g/H qFr9DjJIcTEqivGGhM8OF+JLyUyozEosz4otKc1KLDzHKcHAoSfDekpoVLiRYlJqeWpGWmQMM NJi0BAePkgivnDRQmre4IDG3ODMdInWKUVFKnLcGpE8AJJFRmgfXBgvuS4yyUsK8jAwMDEI8B alFuZklqPKvGMU5GJWEeZlBxvNk5pXATX8FtJgJaHFx7AyQxSWJCCmpBkbmA7Hup0VLTiyWWb Xhe9mZD01bDeqP2RRdS2su+8On8PEGf8cBj5odG3R/G7h89P3W2c8bcjaTTfe28Mf1RzuWFWf u41/+e+eD3OKVBtstU722TzW9kmPOftX31vEfv9WDXa5X/e7N1S9ddMXh59kj//bXGGdNd9Sa zJktEpheU52qu9VbMVmJpTgj0VCLuag4EQCnG1dfaQIAAA== X-Env-Sender: julien.grall@arm.com X-Msg-Ref: server-8.tower-206.messagelabs.com!1469717515!51665374!1 X-Originating-IP: [217.140.101.70] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 8.77; banners=-,-,- X-VirusChecked: Checked Received: (qmail 28475 invoked from network); 28 Jul 2016 14:51:55 -0000 Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by server-8.tower-206.messagelabs.com with SMTP; 28 Jul 2016 14:51:55 -0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 69054AB4; Thu, 28 Jul 2016 07:53:12 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.218.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 3357B3F21A; Thu, 28 Jul 2016 07:51:54 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xen.org Date: Thu, 28 Jul 2016 15:51:25 +0100 Message-Id: <1469717505-8026-3-git-send-email-julien.grall@arm.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1469717505-8026-1-git-send-email-julien.grall@arm.com> References: <1469717505-8026-1-git-send-email-julien.grall@arm.com> Cc: proskurin@sec.in.tum.de, Julien Grall , sstabellini@kernel.org, steve.capper@arm.com, wei.chen@linaro.org Subject: [Xen-devel] [RFC 02/22] xen/arm: p2m: Store in p2m_domain whether we need to clean the entry X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" Each entry in the page table has to table clean when the IOMMU does not support coherent walk. Rather than querying every time the page table is updated, it is possible to do it only once when the p2m is initialized. This is because this value can never change, Xen would be in big trouble otherwise. With this change, the initialize of the IOMMU for a given domain has to be done earlier in order to know whether the page table entries need to be clean. It is fine to move the call earlier because it has no dependency. Signed-off-by: Julien Grall --- xen/arch/arm/domain.c | 8 +++++--- xen/arch/arm/p2m.c | 47 ++++++++++++++++++++++------------------------- xen/include/asm-arm/p2m.h | 3 +++ 3 files changed, 30 insertions(+), 28 deletions(-) diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c index 20bb2ba..48f04c8 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -555,6 +555,11 @@ int arch_domain_create(struct domain *d, unsigned int domcr_flags, return 0; ASSERT(config != NULL); + + /* p2m_init relies on some value initialized by the IOMMU subsystem */ + if ( (rc = iommu_domain_init(d)) != 0 ) + goto fail; + if ( (rc = p2m_init(d)) != 0 ) goto fail; @@ -637,9 +642,6 @@ int arch_domain_create(struct domain *d, unsigned int domcr_flags, if ( is_hardware_domain(d) && (rc = domain_vuart_init(d)) ) goto fail; - if ( (rc = iommu_domain_init(d)) != 0 ) - goto fail; - return 0; fail: diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c index 40a0b80..d389f2b 100644 --- a/xen/arch/arm/p2m.c +++ b/xen/arch/arm/p2m.c @@ -416,7 +416,7 @@ static inline void p2m_remove_pte(lpae_t *p, bool_t flush_cache) * level_shift is the number of bits at the level we want to create. */ static int p2m_create_table(struct p2m_domain *p2m, lpae_t *entry, - int level_shift, bool_t flush_cache) + int level_shift) { struct page_info *page; lpae_t *p; @@ -462,7 +462,7 @@ static int p2m_create_table(struct p2m_domain *p2m, lpae_t *entry, else clear_page(p); - if ( flush_cache ) + if ( p2m->clean_pte ) clean_dcache_va_range(p, PAGE_SIZE); unmap_domain_page(p); @@ -470,7 +470,7 @@ static int p2m_create_table(struct p2m_domain *p2m, lpae_t *entry, pte = mfn_to_p2m_entry(_mfn(page_to_mfn(page)), p2m_invalid, p2m->default_access); - p2m_write_pte(entry, pte, flush_cache); + p2m_write_pte(entry, pte, p2m->clean_pte); return 0; } @@ -653,12 +653,10 @@ static const paddr_t level_shifts[] = static int p2m_shatter_page(struct p2m_domain *p2m, lpae_t *entry, - unsigned int level, - bool_t flush_cache) + unsigned int level) { const paddr_t level_shift = level_shifts[level]; - int rc = p2m_create_table(p2m, entry, - level_shift - PAGE_SHIFT, flush_cache); + int rc = p2m_create_table(p2m, entry, level_shift - PAGE_SHIFT); if ( !rc ) { @@ -680,7 +678,6 @@ static int p2m_shatter_page(struct p2m_domain *p2m, static int apply_one_level(struct domain *d, lpae_t *entry, unsigned int level, - bool_t flush_cache, enum p2m_operation op, paddr_t start_gpaddr, paddr_t end_gpaddr, @@ -719,7 +716,7 @@ static int apply_one_level(struct domain *d, if ( level < 3 ) pte.p2m.table = 0; /* Superpage entry */ - p2m_write_pte(entry, pte, flush_cache); + p2m_write_pte(entry, pte, p2m->clean_pte); *flush |= p2m_valid(orig_pte); @@ -754,7 +751,7 @@ static int apply_one_level(struct domain *d, /* Not present -> create table entry and descend */ if ( !p2m_valid(orig_pte) ) { - rc = p2m_create_table(p2m, entry, 0, flush_cache); + rc = p2m_create_table(p2m, entry, 0); if ( rc < 0 ) return rc; return P2M_ONE_DESCEND; @@ -764,7 +761,7 @@ static int apply_one_level(struct domain *d, if ( p2m_mapping(orig_pte) ) { *flush = true; - rc = p2m_shatter_page(p2m, entry, level, flush_cache); + rc = p2m_shatter_page(p2m, entry, level); if ( rc < 0 ) return rc; } /* else: an existing table mapping -> descend */ @@ -801,7 +798,7 @@ static int apply_one_level(struct domain *d, * and descend. */ *flush = true; - rc = p2m_shatter_page(p2m, entry, level, flush_cache); + rc = p2m_shatter_page(p2m, entry, level); if ( rc < 0 ) return rc; @@ -827,7 +824,7 @@ static int apply_one_level(struct domain *d, *flush = true; - p2m_remove_pte(entry, flush_cache); + p2m_remove_pte(entry, p2m->clean_pte); p2m_mem_access_radix_set(p2m, paddr_to_pfn(*addr), p2m_access_rwx); *addr += level_size; @@ -886,7 +883,7 @@ static int apply_one_level(struct domain *d, /* Shatter large pages as we descend */ if ( p2m_mapping(orig_pte) ) { - rc = p2m_shatter_page(p2m, entry, level, flush_cache); + rc = p2m_shatter_page(p2m, entry, level); if ( rc < 0 ) return rc; } /* else: an existing table mapping -> descend */ @@ -904,7 +901,7 @@ static int apply_one_level(struct domain *d, return rc; p2m_set_permission(&pte, pte.p2m.type, a); - p2m_write_pte(entry, pte, flush_cache); + p2m_write_pte(entry, pte, p2m->clean_pte); } *addr += level_size; @@ -954,17 +951,9 @@ static int apply_p2m_changes(struct domain *d, const unsigned int preempt_count_limit = (op == MEMACCESS) ? 1 : 0x2000; const bool_t preempt = !is_idle_vcpu(current); bool_t flush = false; - bool_t flush_pt; PAGE_LIST_HEAD(free_pages); struct page_info *pg; - /* - * Some IOMMU don't support coherent PT walk. When the p2m is - * shared with the CPU, Xen has to make sure that the PT changes have - * reached the memory - */ - flush_pt = iommu_enabled && !iommu_has_feature(d, IOMMU_FEAT_COHERENT_WALK); - p2m_write_lock(p2m); /* Static mapping. P2M_ROOT_PAGES > 1 are handled below */ @@ -1070,7 +1059,7 @@ static int apply_p2m_changes(struct domain *d, lpae_t old_entry = *entry; ret = apply_one_level(d, entry, - level, flush_pt, op, + level, op, start_gpaddr, end_gpaddr, &addr, &maddr, &flush, t, a); @@ -1127,7 +1116,7 @@ static int apply_p2m_changes(struct domain *d, page_list_del(pg, &p2m->pages); - p2m_remove_pte(entry, flush_pt); + p2m_remove_pte(entry, p2m->clean_pte); p2m->stats.mappings[level - 1]--; update_reference_mapping(pages[level - 1], old_entry, *entry); @@ -1399,6 +1388,14 @@ int p2m_init(struct domain *d) p2m->mem_access_enabled = false; radix_tree_init(&p2m->mem_access_settings); + /* + * Some IOMMUs don't support coherent PT walk. When the p2m is + * shared with the CPU, Xen has to make sure that the PT changes have + * reached the memory + */ + p2m->clean_pte = iommu_enabled && + !iommu_has_feature(d, IOMMU_FEAT_COHERENT_WALK); + rc = p2m_alloc_table(d); return rc; diff --git a/xen/include/asm-arm/p2m.h b/xen/include/asm-arm/p2m.h index 53c4d78..03bfd5e 100644 --- a/xen/include/asm-arm/p2m.h +++ b/xen/include/asm-arm/p2m.h @@ -48,6 +48,9 @@ struct p2m_domain { * decrease. */ gfn_t lowest_mapped_gfn; + /* Indicate if it is required to clean the cache when writing an entry */ + bool_t clean_pte; + /* Gather some statistics for information purposes only */ struct { /* Number of mappings at each p2m tree level */