From patchwork Fri Mar 9 15:11:20 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 131139 Delivered-To: patch@linaro.org Received: by 10.80.194.209 with SMTP id u17csp1135161edf; Fri, 9 Mar 2018 07:13:48 -0800 (PST) X-Google-Smtp-Source: AG47ELshqGqvPPv3zaBqxXu4JBgYhHSFxXxcUtY/9WUhygCzUxGS5Jb/eezWdmhGJ7mz4veavVLD X-Received: by 10.107.173.144 with SMTP id m16mr37385533ioo.32.1520608427850; Fri, 09 Mar 2018 07:13:47 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1520608427; cv=none; d=google.com; s=arc-20160816; b=YcK0+1t9iIgS31n0v3UIX3rVsudrlVLt1tZwajBZdutMkQIDMBKTEdPjG0GnXi99vH SxnOZPa9E0570OUL3hKfHx6jqmOvDTNifvttugkqX7NjqvW2r3XfUiAoHVRLVDfAiFAg qfcv8lURXw8cqCGou8Z5uw/0mxt7dJ9B9SJVuxyLJKIFjL3+fqZMbQ8xEWw1q0uqWjbx txk7GYZCwUTKOtNNKth1XJl4rIeb8xaN36l3doV1FekmvJDWzUfiZ64kX6aC4y4dHBXC Ub/HOc0hRTSrW+qWOU9UeWgLB3nX9v+oIqeab4rics7phoUV8r3MPXIYPkXGKsMVZjbx DHyg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:cc:references:in-reply-to:message-id:date:to :from:dkim-signature:arc-authentication-results; bh=i1sg7JrE38ukxqPyNgh6dCI2RSLbQ+nPwLlQwRBBLtE=; b=fSPBCaCXXbcNoeV6Y65FwiQdX8onSC7bpiaWrUTQH7INvbEKaq0J+iTZNnrCWTPaJW 1GOgZkIdT+MFAotdb84G1ogBWReqp3WLTTEAbGrSAe1YzOgfN+ngjRlhxQQFnf5WZUMH pQbAv9vXGrM2Aed1ac6KnaUqUbV6JrkM+lIAoWci+qxUHpdT4egBsc8wiAOpuso/+idy jq0eKro/6MHAeAsf0H/AdpQR8YUl0CXaxIZG4EBe4r2nevsNzE0+Y8FZMMk+FaZQ8dJa JhXLblGrL1Nrm2kuGVXrSB6BnmkQu/dnkMKKBtXRyE4/CNTrc5O+Rf1uBYSBtJbI2Z+M NE5Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=aP+zS+Km; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id r132si1320144itd.155.2018.03.09.07.13.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 09 Mar 2018 07:13:47 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=aP+zS+Km; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1euJgU-0005qL-SI; Fri, 09 Mar 2018 15:11:50 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1euJgT-0005pq-UL for xen-devel@lists.xenproject.org; Fri, 09 Mar 2018 15:11:49 +0000 X-Inumbo-ID: 0501f2ec-23ac-11e8-ba59-bc764e045a96 Received: from mail-wm0-x244.google.com (unknown [2a00:1450:400c:c09::244]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTPS id 0501f2ec-23ac-11e8-ba59-bc764e045a96; Fri, 09 Mar 2018 16:10:36 +0100 (CET) Received: by mail-wm0-x244.google.com with SMTP id 139so4518325wmn.2 for ; Fri, 09 Mar 2018 07:11:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Uvgubc2OSRmzdFpzPBwUUBWDNrjgTAq/Hpsqd44u9Bs=; b=aP+zS+KmFB0miT32IFp25krijz3aPnKGQuQvsvOuQATMy99WSwtInyeFm802ZPYCf1 xiQNVI4cWtMbuzEna0BoBoop4v3rY4tZPiOUC0UI5utdfT/SvTrLhXImUUJcSFrR5dU/ FjkZVPeRuc2X6twQo4eSx/X9NDdAUvCFam7T8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Uvgubc2OSRmzdFpzPBwUUBWDNrjgTAq/Hpsqd44u9Bs=; b=pxnVi34UVN+tXsO7SCulgkzXtM8Xqlzuy4Cuud21Y0Gz92e/doMMzecAPxDvLWCETu vqpBKhKiYAgxoHTMSWthsoO0+FWG9MnaA50NM0MFlfAlvgUiuljCBKWs56JGDYWt5DbJ vfRf9hCJSPhtIpWuwRhXfcD5ViYjiLKWV/DDqefHSXy4Ye9skuiJk9SpAzeRFirsvdn/ mvh+akIYibwrD/ZjBdMGGQFFTjE5AAk5aGYMTpSPvwDvYtAkXakc6UwxpxB18wtdyjvS h9JncI62SOY5HKzjwiqnN0patORDfx1aib1vo0x9fwek7J2w5GYSJ4thh6lZo7ofo6Ft pT2w== X-Gm-Message-State: AElRT7GMcrGTOWVKV9+/KFXF2AS06DqDfxglSBxca4JSFNSOSluHlNVG F6aXA2swYSmydUMV7Y8H1ipmOTCAT7U= X-Received: by 10.28.173.198 with SMTP id w189mr2473713wme.139.1520608307451; Fri, 09 Mar 2018 07:11:47 -0800 (PST) Received: from e104803-lin.lan (mail.andrep.de. [217.160.17.100]) by smtp.gmail.com with ESMTPSA id 1sm1721198wmj.35.2018.03.09.07.11.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 09 Mar 2018 07:11:47 -0800 (PST) From: Andre Przywara To: Stefano Stabellini , Julien Grall Date: Fri, 9 Mar 2018 15:11:20 +0000 Message-Id: <20180309151133.31371-5-andre.przywara@linaro.org> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180309151133.31371-1-andre.przywara@linaro.org> References: <20180309151133.31371-1-andre.przywara@linaro.org> Cc: xen-devel@lists.xenproject.org Subject: [Xen-devel] [PATCH 04/17] ARM: vGICv3: remove rdist_stride from VGIC structure X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" The last patch removed the usage of the hardware's redistributor-stride value from our (Dom0) GICv3 emulation. This means we no longer need to store this value in the VGIC data structure. Remove that variable and every code snippet that handled that, instead simply always use the architected value. Signed-off-by: Andre Przywara Acked-by: Julien Grall --- xen/arch/arm/gic-v3.c | 3 +-- xen/arch/arm/vgic-v3.c | 14 -------------- xen/include/asm-arm/domain.h | 1 - xen/include/asm-arm/vgic.h | 1 - xen/include/public/arch-arm.h | 1 - 5 files changed, 1 insertion(+), 19 deletions(-) diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c index 047af691b1..4acdd0ad91 100644 --- a/xen/arch/arm/gic-v3.c +++ b/xen/arch/arm/gic-v3.c @@ -1680,8 +1680,7 @@ static int __init gicv3_init(void) reg = readl_relaxed(GICD + GICD_TYPER); intid_bits = GICD_TYPE_ID_BITS(reg); - vgic_v3_setup_hw(dbase, gicv3.rdist_count, gicv3.rdist_regions, - gicv3.rdist_stride, intid_bits); + vgic_v3_setup_hw(dbase, gicv3.rdist_count, gicv3.rdist_regions, intid_bits); gicv3_init_v2(); spin_lock_init(&gicv3.lock); diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c index 56cc38ffcc..4b42739a52 100644 --- a/xen/arch/arm/vgic-v3.c +++ b/xen/arch/arm/vgic-v3.c @@ -58,21 +58,18 @@ static struct { /* Re-distributor regions */ unsigned int nr_rdist_regions; const struct rdist_region *regions; - uint32_t rdist_stride; /* Re-distributor stride */ unsigned int intid_bits; /* Number of interrupt ID bits */ } vgic_v3_hw; void vgic_v3_setup_hw(paddr_t dbase, unsigned int nr_rdist_regions, const struct rdist_region *regions, - uint32_t rdist_stride, unsigned int intid_bits) { vgic_v3_hw.enabled = true; vgic_v3_hw.dbase = dbase; vgic_v3_hw.nr_rdist_regions = nr_rdist_regions; vgic_v3_hw.regions = regions; - vgic_v3_hw.rdist_stride = rdist_stride; vgic_v3_hw.intid_bits = intid_bits; } @@ -1672,15 +1669,6 @@ static int vgic_v3_domain_init(struct domain *d) d->arch.vgic.dbase = vgic_v3_hw.dbase; - d->arch.vgic.rdist_stride = vgic_v3_hw.rdist_stride; - /* - * If the stride is not set, the default stride for GICv3 is 2 * 64K: - * - first 64k page for Control and Physical LPIs - * - second 64k page for Control and Generation of SGIs - */ - if ( !d->arch.vgic.rdist_stride ) - d->arch.vgic.rdist_stride = 2 * SZ_64K; - for ( i = 0; i < vgic_v3_hw.nr_rdist_regions; i++ ) { paddr_t size = vgic_v3_hw.regions[i].size; @@ -1703,8 +1691,6 @@ static int vgic_v3_domain_init(struct domain *d) /* A single Re-distributor region is mapped for the guest. */ BUILD_BUG_ON(GUEST_GICV3_RDIST_REGIONS != 1); - d->arch.vgic.rdist_stride = GUEST_GICV3_RDIST_STRIDE; - /* The first redistributor should contain enough space for all CPUs */ BUILD_BUG_ON((GUEST_GICV3_GICR0_SIZE / GICV3_GICR_SIZE) < MAX_VIRT_CPUS); d->arch.vgic.rdist_regions[0].base = GUEST_GICV3_GICR0_BASE; diff --git a/xen/include/asm-arm/domain.h b/xen/include/asm-arm/domain.h index 0dd8c954e2..aee247a037 100644 --- a/xen/include/asm-arm/domain.h +++ b/xen/include/asm-arm/domain.h @@ -105,7 +105,6 @@ struct arch_domain unsigned int first_cpu; /* First CPU handled */ } *rdist_regions; int nr_regions; /* Number of rdist regions */ - uint32_t rdist_stride; /* Re-Distributor stride */ unsigned long int nr_lpis; uint64_t rdist_propbase; struct rb_root its_devices; /* Devices mapped to an ITS */ diff --git a/xen/include/asm-arm/vgic.h b/xen/include/asm-arm/vgic.h index 6ea9f140a7..d61b54867b 100644 --- a/xen/include/asm-arm/vgic.h +++ b/xen/include/asm-arm/vgic.h @@ -261,7 +261,6 @@ struct rdist_region; void vgic_v3_setup_hw(paddr_t dbase, unsigned int nr_rdist_regions, const struct rdist_region *regions, - uint32_t rdist_stride, unsigned int intid_bits); #endif diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h index 05fd11ca38..eb424e8286 100644 --- a/xen/include/public/arch-arm.h +++ b/xen/include/public/arch-arm.h @@ -401,7 +401,6 @@ typedef uint64_t xen_callback_t; #define GUEST_GICV3_GICD_BASE xen_mk_ullong(0x03001000) #define GUEST_GICV3_GICD_SIZE xen_mk_ullong(0x00010000) -#define GUEST_GICV3_RDIST_STRIDE xen_mk_ullong(0x00020000) #define GUEST_GICV3_RDIST_REGIONS 1 #define GUEST_GICV3_GICR0_BASE xen_mk_ullong(0x03020000) /* vCPU0..127 */