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[192.237.175.120]) by mx.google.com with ESMTPS id l17si51676080iom.138.2019.07.22.14.41.13 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 22 Jul 2019 14:41:13 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hpg2h-0002iY-Hc; Mon, 22 Jul 2019 21:40:23 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hpg2f-0002fA-R2 for xen-devel@lists.xenproject.org; Mon, 22 Jul 2019 21:40:21 +0000 X-Inumbo-ID: 4e2d3518-acc9-11e9-8980-bc764e045a96 Received: from foss.arm.com (unknown [217.140.110.172]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id 4e2d3518-acc9-11e9-8980-bc764e045a96; Mon, 22 Jul 2019 21:40:21 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 17CDB15A1; Mon, 22 Jul 2019 14:40:21 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 65BE73F71F; Mon, 22 Jul 2019 14:40:20 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Mon, 22 Jul 2019 22:39:40 +0100 Message-Id: <20190722213958.5761-18-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190722213958.5761-1-julien.grall@arm.com> References: <20190722213958.5761-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH v2 17/35] xen/arm64: head: Setup TTBR_EL2 in enable_mmu() and add missing isb X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Julien Grall , Stefano Stabellini , Volodymyr Babchuk MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" At the moment, TTBR_EL2 is setup in create_page_tables(). This is fine as it is called by every CPUs. However, such assumption may not hold in the future. To make change easier, the TTBR_EL2 is not setup in enable_mmu(). Take the opportunity to add the missing isb() to ensure the TTBR_EL2 is seen before the MMU is turned on. Signed-off-by: Julien Grall Reviewed-by: Stefano Stabellini --- Changes in v2: - Patch added --- xen/arch/arm/arm64/head.S | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index 7541635102..9afd89d447 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -501,9 +501,7 @@ create_page_tables: cmp x19, #XEN_VIRT_START cset x25, eq /* x25 := identity map in place, or not */ - /* Write Xen's PT's paddr into TTBR0_EL2 */ load_paddr x4, boot_pgtable - msr TTBR0_EL2, x4 /* Setup boot_pgtable: */ load_paddr x1, boot_first @@ -631,6 +629,11 @@ enable_mmu: tlbi alle2 /* Flush hypervisor TLBs */ dsb nsh + /* Write Xen's PT's paddr into TTBR0_EL2 */ + load_paddr x0, boot_pgtable + msr TTBR0_EL2, x0 + isb + mrs x0, SCTLR_EL2 orr x0, x0, #SCTLR_Axx_ELx_M /* Enable MMU */ orr x0, x0, #SCTLR_Axx_ELx_C /* Enable D-cache */