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Fri, 08 Jun 2018 00:28:34 -0700 (PDT) Received: from localhost.localdomain ([2601:646:877f:9499::c68]) by smtp.gmail.com with ESMTPSA id v15-v6sm33935578pfk.12.2018.06.08.00.28.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 08 Jun 2018 00:28:33 -0700 (PDT) From: Khem Raj To: openembedded-core@lists.openembedded.org Date: Fri, 8 Jun 2018 00:28:26 -0700 Message-Id: <62c1f5167d8386a2e47e18828049c9478f4c5311.1528442551.git.raj.khem@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: Subject: [OE-core] [PATCH 6/7] tune-mips-74k.inc: add tune file for 74kc mips X-BeenThere: openembedded-core@lists.openembedded.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: Patches and discussions about the oe-core layer List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: openembedded-core-bounces@lists.openembedded.org Errors-To: openembedded-core-bounces@lists.openembedded.org Signed-off-by: Khem Raj --- .../machine/include/mips/tune-mips-74k.inc | 37 +++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 meta/conf/machine/include/mips/tune-mips-74k.inc -- 2.17.1 -- _______________________________________________ Openembedded-core mailing list Openembedded-core@lists.openembedded.org http://lists.openembedded.org/mailman/listinfo/openembedded-core diff --git a/meta/conf/machine/include/mips/tune-mips-74k.inc b/meta/conf/machine/include/mips/tune-mips-74k.inc new file mode 100644 index 0000000000..94afee34bd --- /dev/null +++ b/meta/conf/machine/include/mips/tune-mips-74k.inc @@ -0,0 +1,37 @@ +DEFAULTTUNE ?= "mips32r2-74kc" + +MIPSPKGSFX_MIPS16E ??= "" + +require conf/machine/include/tune-mips32r2.inc +require conf/machine/include/mips/feature-mips-mips16e.inc + + +TUNEVALID[74kc] = "Enable MIPS 74K with DSPr2 processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "74kc", " -mtune=74kc", "", d)}" + +AVAILTUNES += "mips32r2-74kc mips32r2-74kc-m16" +AVAILTUNES += "mips32r2el-74kc mips32r2el-74kc-m16" + +# big endian: kc+dsp2=kc, kc+dsp2+mips16e=kc-m16 +TUNE_FEATURES_tune-mips32r2-74kc = "${TUNE_FEATURES_tune-mips32r2-nf} 74kc" +TUNE_FEATURES_tune-mips32r2-74kc-m16 = "${TUNE_FEATURES_tune-mips32r2-74kc} mips16e" + +MIPSPKGSFX_VARIANT_tune-mips32r2-74kc = "mips32r2-74kc" +PACKAGE_EXTRA_ARCHS_tune-mips32r2-74kc = "${PACKAGE_EXTRA_ARCHS_tune-mips32r2-nf} mips32r2-74kc-nf" +QEMU_EXTRAOPTIONS_mips32r2-74kc-nf = " -cpu 24Kc" + +MIPSPKGSFX_VARIANT_tune-mips32r2-74kc-m16 = "mips32r2-74kc${MIPSPKGSFX_MIPS16E}" +PACKAGE_EXTRA_ARCHS_tune-mips32r2-74kc-m16 = "${PACKAGE_EXTRA_ARCHS_tune-mips32r2-74kc} mips32r2-74kc-m16-nf" +QEMU_EXTRAOPTIONS_mips32r2-74kc-m16-nf = " -cpu 24KEc" + +# little endian: kc+dsp2=kc, kc+dsp2+mips16e=kc-m16 +TUNE_FEATURES_tune-mips32r2el-74kc = "${TUNE_FEATURES_tune-mips32r2el-nf} 74kc" +TUNE_FEATURES_tune-mips32r2el-74kc-m16 = "${TUNE_FEATURES_tune-mips32r2el-74kc} mips16e" + +MIPSPKGSFX_VARIANT_tune-mips32r2el-74kc = "mips32r2el-74kc" +PACKAGE_EXTRA_ARCHS_tune-mips32r2el-74kc = "${PACKAGE_EXTRA_ARCHS_tune-mips32r2el-nf} mips32r2el-74kc-nf" +QEMU_EXTRAOPTIONS_mips32r2el-74kc-nf = " -cpu 24Kc" + +MIPSPKGSFX_VARIANT_tune-mips32r2el-74kc-m16 = "mips32r2el-74kc${MIPSPKGSFX_MIPS16E}" +PACKAGE_EXTRA_ARCHS_tune-mips32r2el-74kc-m16 = "${PACKAGE_EXTRA_ARCHS_tune-mips32r2el-74kc} mips32r2el-74kc-m16-nf" +QEMU_EXTRAOPTIONS_mips32r2el-74kc-m16-nf = " -cpu 24KEc"