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[46.33.159.2]) by mx.google.com with ESMTPSA id x13sm31876416wib.3.2013.06.13.07.52.58 for (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 13 Jun 2013 07:52:59 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xen.org Cc: stefano.stabellini@citrix.com, ian.campbell@citrix.com, patches@linaro.org, sander.bogaert@elis.ugent.be, Julien Grall Subject: [PATCH v2] xen/arm: Use the right GICD register to initialize IRQs routing Date: Thu, 13 Jun 2013 15:52:49 +0100 Message-Id: <1371135169-18205-1-git-send-email-julien.grall@linaro.org> X-Mailer: git-send-email 1.7.10.4 X-Gm-Message-State: ALoCoQnkbNlphkPmzAXTpb21772KnB3DExP+UOAlZZJjNrMXVYDuurcml4Ohzg7rvdC4tZ+9htOC X-Original-Sender: julien.grall@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.176 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Currently IRQs routing is initialized to the wrong register and overwrites interrupt configuration register (ICFGRn). Reported-by: Sander Bogaert Signed-off-by: Julien Grall --- Changes in v2: - cpumask was already good... --- xen/arch/arm/gic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index d9940ea..177560e 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -280,7 +280,7 @@ static void __init gic_dist_init(void) /* Route all global IRQs to this CPU */ for ( i = 32; i < gic.lines; i += 4 ) - GICD[GICD_ICFGR + i / 4] = cpumask; + GICD[GICD_ITARGETSR + i / 4] = cpumask; /* Default priority for global interrupts */ for ( i = 32; i < gic.lines; i += 4 )