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([185.25.64.249]) by mx.google.com with ESMTPSA id a8sm5590498wie.6.1969.12.31.16.00.00 (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 28 Aug 2013 07:48:35 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xen.org Cc: stefano.stabellini@eu.citrix.com, ian.campbell@citrix.com, patches@linaro.org, andre.przywara@linaro.org, Julien Grall Subject: [PATCH V1 21/29] xen/arm: Create a fake GIC node in dom0 device tree Date: Wed, 28 Aug 2013 15:47:35 +0100 Message-Id: <1377701263-3319-22-git-send-email-julien.grall@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1377701263-3319-1-git-send-email-julien.grall@linaro.org> References: <1377701263-3319-1-git-send-email-julien.grall@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: julien.grall@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.180 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Recreate the GIC node and remove hypervisor specific ranges (vgic and hypervisor controls). Signed-off-by: Julien Grall --- xen/arch/arm/domain_build.c | 78 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 78 insertions(+) diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index 21cd4e0..c57a79d 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -425,6 +425,79 @@ static int make_cpus_node(const struct domain *d, void *fdt, return res; } +static int make_gic_node(const struct domain *d, void *fdt, + const struct dt_device_node *parent) +{ + const struct dt_device_node *gic = dt_interrupt_controller; + const void *compatible = NULL; + u32 len; + __be32 *new_cells, *tmp; + int res = 0; + + DPRINT("Create gic node\n"); + + compatible = dt_get_property(gic, "compatible", &len); + if ( !compatible ) + { + dprintk(XENLOG_ERR, "Can't find compatible property for the gic node\n"); + return -FDT_ERR_XEN(ENOENT); + } + + res = fdt_begin_node(fdt, "interrupt-controller"); + if ( res ) + return res; + + res = fdt_property(fdt, "compatible", compatible, len); + if ( res ) + return res; + + res = fdt_property_cell(fdt, "#interrupt-cells", 3); + if ( res ) + return res; + + res = fdt_property(fdt, "interrupt-controller", NULL, 0); + + if ( res ) + return res; + + len = dt_cells_to_size(dt_n_addr_cells(parent) + dt_n_size_cells(parent)); + len *= 2; + new_cells = xzalloc_bytes(dt_cells_to_size(len)); + if ( new_cells == NULL ) + return -FDT_ERR_XEN(ENOMEM); + + tmp = new_cells; + DPRINT(" Set Distributor Base 0x%"PRIpaddr"-0x%"PRIpaddr"\n", + d->arch.vgic.dbase, d->arch.vgic.dbase + PAGE_SIZE - 1); + dt_set_range(&tmp, parent, d->arch.vgic.dbase, PAGE_SIZE); + + DPRINT(" Set Cpu Base 0x%"PRIpaddr" size = 0x%"PRIpaddr"\n", + d->arch.vgic.cbase, d->arch.vgic.cbase + (PAGE_SIZE * 2) - 1); + dt_set_range(&tmp, parent, d->arch.vgic.cbase, PAGE_SIZE * 2); + + res = fdt_property(fdt, "reg", new_cells, len); + xfree(new_cells); + + if ( res ) + return res; + + /* + * The value of the property "phandle" in the property "interrupts" + * to know on which interrupt controller the interrupt is wired. + */ + if ( gic->phandle ) + { + DPRINT(" Set phandle = 0x%x\n", gic->phandle); + res = fdt_property_cell(fdt, "phandle", gic->phandle); + if ( res ) + return res; + } + + res = fdt_end_node(fdt); + + return res; +} + /* Map the device in the domain */ static int map_device(struct domain *d, const struct dt_device_node *dev) { @@ -514,6 +587,7 @@ static int handle_node(struct domain *d, struct kernel_info *kinfo, DT_MATCH_COMPATIBLE("xen,multiboot-module"), DT_MATCH_COMPATIBLE("arm,psci"), DT_MATCH_PATH("/cpus"), + DT_MATCH_COMPATIBLE("arm,cortex-a15-gic"), { /* sentinel */ }, }; const struct dt_device_node *child; @@ -587,6 +661,10 @@ static int handle_node(struct domain *d, struct kernel_info *kinfo, res = make_cpus_node(d, kinfo->fdt, np); if ( res ) return res; + + res = make_gic_node(d, kinfo->fdt, np); + if ( res ) + return res; } res = fdt_end_node(kinfo->fdt);